[U-Boot-Users] 85xx CDS question
robert lazarski
robertlazarski at gmail.com
Mon Aug 20 21:51:14 CEST 2007
Hi all, I pulled u-boot from git today since the merge window is now
cleared. I'm gearing u-boot up for my custom 8548 board that'll be
ready this week. My question is about PCI2 Memory in the CDS example -
I don't see an entry here:
* 0x0000_0000 0x7fff_ffff DDR 2G
* 0x8000_0000 0x9fff_ffff PCI1 MEM 512M
* 0xa000_0000 0xbfff_ffff PCIe MEM 512M
* 0xc000_0000 0xdfff_ffff RapidIO 512M
* 0xe000_0000 0xe000_ffff CCSR 1M
* 0xe200_0000 0xe10f_ffff PCI1 IO 1M
* 0xe280_0000 0xe20f_ffff PCI2 IO 1M
* 0xe300_0000 0xe30f_ffff PCIe IO 1M
* 0xf000_0000 0xf3ff_ffff SDRAM 64M
* 0xf800_0000 0xf80f_ffff NVRAM/CADMUS (*) 1M
* 0xff00_0000 0xff7f_ffff FLASH (2nd bank) 8M
* 0xff80_0000 0xffff_ffff FLASH (boot bank) 8M
My board is similair except we don't have RapidIO, SDRAM or CADMUS.
Without RapidIO, we have PCIE as 8x speed if that matters.
Looking at the manual, Table 16-3 says "PCI/X Controller 2
Memory-Mapped Registers—Block Base Address 0x0_9000" . Is the above
entry for both PCI1 and PCI2 ?
Thanks!
Robert
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