[U-Boot-Users] [Ticket#2007011742000223] [PATCH] Fix PCI I/O space mapping on Freescale MPC [...]
OTRS Notification Master
otrs at denx.de
Wed Jan 17 17:01:21 CET 2007
Hello list,
inside the automatic U-Boot patch tracking system a new ticket
[DNX#2007011742000223] was created:
<snip>
> The PCI I/O space mapping for Freescale MPC8540ADS board was broken by
> commit
> 52c7a68b8d587ebcf5a6b051b58b3d3ffa377ddc which failed to update the
> #define's
> describing the local address window used for the PCI I/O space accesses
> -- fix
> this and carry over the necessary changes into the MPC8560ADS code since
> the
> PCI I/O space mapping was also broken for this board (by the earlier
> commit
> 087454609e47295443af793a282cddcd91a5f49c). Add the comments clarifying
> how
> the PCI I/O space must be mapped to all the MPC85xx board config.
> headers.
>
> Signed-off-by: Sergei Shtylyov <sshtylyov at ru.mvista.com>
>
> board/mpc8540ads/init.S | 4 ++--
> board/mpc8560ads/init.S | 4 ++--
> include/configs/MPC8540ADS.h | 5 ++---
> include/configs/MPC8541CDS.h | 2 +-
> include/configs/MPC8548CDS.h | 2 +-
> include/configs/MPC8560ADS.h | 8 ++++----
> 6 files changed, 12 insertions(+), 13 deletions(-)
>
> Index: u-boot/board/mpc8540ads/init.S
> ===================================================================
> --- u-boot.orig/board/mpc8540ads/init.S
> +++ u-boot/board/mpc8540ads/init.S
> @@ -260,8 +260,8 @@ tlb1_entry:
> #define LAWBAR2 ((CFG_LBC_SDRAM_BASE>>12) & 0xfffff)
> #define LAWAR2 (LAWAR_EN | LAWAR_TRGT_IF_LBC | (LAWAR_SIZE &
> LAWAR_SIZE_256M))
>
> -#define LAWBAR3 ((CFG_PCI1_IO_BASE>>12) & 0xfffff)
> -#define LAWAR3 (LAWAR_EN | LAWAR_TRGT_IF_PCIX | (LAWAR_SIZE &
> LAWAR_SIZE_16M))
> +#define LAWBAR3 ((CFG_PCI1_IO_PHYS>>12) & 0xfffff)
> +#define LAWAR3 (LAWAR_EN | LAWAR_TRGT_IF_PCIX | (LAWAR_SIZE &
> LAWAR_SIZE_1M))
>
> /*
> * Rapid IO at 0xc000_0000 for 512 M
> Index: u-boot/board/mpc8560ads/init.S
> ===================================================================
> --- u-boot.orig/board/mpc8560ads/init.S
> +++ u-boot/board/mpc8560ads/init.S
> @@ -260,8 +260,8 @@ tlb1_entry:
> #define LAWBAR2 ((CFG_LBC_SDRAM_BASE>>12) & 0xfffff)
> #define LAWAR2 (LAWAR_EN | LAWAR_TRGT_IF_LBC | (LAWAR_SIZE &
> LAWAR_SIZE_256M))
>
> -#define LAWBAR3 ((CFG_PCI1_IO_BASE>>12) & 0xfffff)
> -#define LAWAR3 (LAWAR_EN | LAWAR_TRGT_IF_PCIX | (LAWAR_SIZE &
> LAWAR_SIZE_16M))
> +#define LAWBAR3 ((CFG_PCI1_IO_PHYS>>12) & 0xfffff)
> +#define LAWAR3 (LAWAR_EN | LAWAR_TRGT_IF_PCIX | (LAWAR_SIZE &
> LAWAR_SIZE_1M))
>
> /*
> * Rapid IO at 0xc000_0000 for 512 M
> Index: u-boot/include/configs/MPC8540ADS.h
> ===================================================================
> --- u-boot.orig/include/configs/MPC8540ADS.h
> +++ u-boot/include/configs/MPC8540ADS.h
> @@ -330,13 +330,12 @@
>
> /*
> * General PCI
> - * Addresses are mapped 1-1.
> + * Memory space is mapped 1-1, but I/O space must start from 0.
> */
> #define CFG_PCI1_MEM_BASE 0x80000000
> #define CFG_PCI1_MEM_PHYS CFG_PCI1_MEM_BASE
> #define CFG_PCI1_MEM_SIZE 0x20000000 /* 512M */
> -
> -#define CFG_PCI1_IO_BASE 0x0
> +#define CFG_PCI1_IO_BASE 0x00000000
> #define CFG_PCI1_IO_PHYS 0xe2000000
> #define CFG_PCI1_IO_SIZE 0x100000 /* 1M */
>
> Index: u-boot/include/configs/MPC8541CDS.h
> ===================================================================
> --- u-boot.orig/include/configs/MPC8541CDS.h
> +++ u-boot/include/configs/MPC8541CDS.h
> @@ -334,7 +334,7 @@ extern unsigned long get_clock_freq(void
>
> /*
> * General PCI
> - * Addresses are mapped 1-1.
> + * Memory space is mapped 1-1, but I/O space must start from 0.
> */
> #define CFG_PCI1_MEM_BASE 0x80000000
> #define CFG_PCI1_MEM_PHYS CFG_PCI1_MEM_BASE
> Index: u-boot/include/configs/MPC8548CDS.h
> ===================================================================
> --- u-boot.orig/include/configs/MPC8548CDS.h
> +++ u-boot/include/configs/MPC8548CDS.h
> @@ -340,7 +340,7 @@ extern unsigned long get_clock_freq(void
>
</snip>
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