[U-Boot-Users] [PATCH 2/3] Added USB PCI-OHCI chips support, interrupt pipe support and usb event poll support.

[Zhang Wei-r63237]

Hi, Robert,

> 
> > > 1. Why are you defining two macros, called 'readl' and 
> 'writel', while
> > > both of these are available from asm/io.h on all architectures?
> > 
> > Yes, but here they're special macros for USB register 
> access. You can
> > refer to the newest usb-git tree of Markus.
> 
> I see; Endianity is a bit tricky here. Though the similar 
> name appeared a bit ambiguous to me.

Yes, they can be changed to usb_readl and usb_writel.

> 
> > > 2. In 'usb_lowlevel_int' the register base address isn't 
> translated
> > > from PCI address space to processor address space.
> > 
> > Does current codes not run well on your system? It's in 
> U-boot now. The
> > address in the PCI bar is processor address.
> 
> No, unfortunately not, but I didn't expect it to work right away ;-).
> 
> I am currently using Markus' u-boot-usb.git repository which 
> is the cleaned up version, as I understand. Our platform is a 
> MIPS32 (4Kec) based asic running in Little Endian mode with a 
> proprietary PCI bus bridge and a quite common ISP1564 OHCI 
> USB controller. Our PCI bus is running properly: We've been 
> using a RTL8139 Ethernet card under U-Boot successfully for a 
> long time.
> 
> The PCI BARs configure the address decoders of a PCI device 
> and thus hold the devices address in PCI space. If your 
> platform uses a non translating PCI bus bridge that address 
> will be indentical to the address in the processors address 
> space. But some platforms use translating bus bridges, such 
> as the Hawk on the PowerPC platform. The RealTek RTL8139 
> Ethernet driver (drivers/rtl8139.c) uses 'pci_mem_to_phys' 
> (from pci.h) to translate the address read from BAR1 to an 
> address in processor space.
> 
> An extra complication is in the memory architecture of the 
> MIPS: On the MIPS the CPU always uses virtual addresses, even 
> when the MMU is off. So, we have to translate a physical 
> register address to a virtual address in the uncached memory 
> segment. The RTL8139 driver seems to do this correctly for 
> the MIPS platform, but I didn't yet take the time to figure 
> out how. For the time being a 'base |= 0xA0000000' suffices.
> 
> I'm still not 100% confident in the Endianity because we are 
> running our MIPS in Little Endian mode, but that hasn't got 
> my focus right now because I assume you have thought about 
> this a lot longer than I did :-).
> 
> With kind regards,
> 

You are right! I'm bound to powerpc only. :) I think you can send a
patch to fix it.

Thanks!
Wei.