[U-Boot-Users] Manual Setup of DDR2

[robert lazarski]

On 7/13/07, Jon Loeliger <jdl at jdl.com> wrote:
> [ Sorry to break the threading here.  --jdl ]
>
> > * Without SPD EEPROM configured DDR, this must be setup manually.
>
> You have two fundamental choices:
>
>     - Use SPD on your DDR and hope that it gets the configuration right,
>
>     - Turn SPD off, read the data sheets, derive memory controller values
>       by hand, set them in the config file and hope they work.
>
> My recommendation is to determine if the DDR2 you plan on using
> will support SPD, and then let the SPD configuration take place.
> It will be less work in the long run if it works.  Note that it
> may _still_ take some tuning and parameter setting that is specific
> to your board (and DDR).  There are values in this code that are
> derived empirically, off a fast scope while looking at the data-eye
> for some specific piece of DDR at a particular speed.  Your milage
> will vary.  And if you don't pay attention here, you will hurt.
> This is one of _the_ single largest U-Boot port failure cases!
>
> Now, the 8548 reference board from Freescale had two type sof
> memory on it.  One of which was on the local bus.  Depending on
> your board, it may or may not have the second memory on it.
> You may, or may not, need to set up different (additional) LAWs
> and mappings for it.  IIRC, some of the memory is tacitly covered
> by one Local bus LAW mapping?  Or may not even be mapped in at all.
>
> You ask if "this" is the right approach, but I'm not really
> sure what it is you are questioning....
>
> The key is to do what is right for your board, of course.
>
> jdl
>

Thanks Jon, your explanation on the two options has helped. My board
has the exact same DDR2 as the reference mpc8548cds , and has the same
eeprom address and contents. I do _not_ if I understand you correctly,
however, have the second memory you mention - SDRAM on the localbus. I
just have DDR2.

What I take your comments and the code to mean is that I'll first try
to use spd_sdram() for my DDR2 and if it works, I don't need to
manually configure a TLB and initdram() .

Regards,
Robert