[U-Boot-Users] EVPR in PPC interrupts.c

alina kisley rvkisley at yahoo.com
Thu May 24 17:50:14 CEST 2007

Ok I read the following note in history of this list:

Call me crazy for pursuing but I'm not sure I can have the SDRAM for my Xilinx re-mapped to 0x0000_0000. (They aren't listening yet).  

lib_ppc/board.c:board_init_f() seems very careful setting up 'addr' to something based off of CFG_SDRAM_BASE, which to me indicates *wanting* to support a non-0 mapping. (I'm an optimist)  The relocate code is pretty careful about it also.

Then you come to the trap handling, and 2 things may allow it to work: 

    1. change 'cpu/ppc4xx/interrupts.c:interrupt_init_cpu() call to set_evpr() to pass in CFG_SDRAM_BASE instead of 0x0000_0000.

    2.  change the 3rd line of cpu/ppc4xx/start.S:trap_init from 
        li    r9, 0x100
        li    r9, 0x100 + CFG_SDRAM_BASE

Then trap handling should work(?). I understand it's the ones I don't see that will kill me, and the Linux kernel change to non-0 based SDRAM is another story completely.  

But has anyone tried this? Can you comment on this approach or a later gotcha I'm not seeing? The board is PPC405 Xilinx, I am prepping now for bringup soon.

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