[U-Boot-Users] [PATCH 17/18] Move the MPC8541/MPC8555/MPC8548 CDS board under board/freescale.

Kumar Gala galak at kernel.crashing.org
Thu Nov 29 22:21:07 CET 2007


Minor path corrections needed to ensure buildability.

Signed-off-by: Kumar Gala <galak at kernel.crashing.org>
---
 Makefile                                           |    6 +-
 board/cds/mpc8548cds/Makefile                      |   60 -----
 board/cds/mpc8555cds/Makefile                      |   60 -----
 board/cds/mpc8555cds/init.S                        |  255 --------------------
 board/cds/mpc8555cds/u-boot.lds                    |  150 ------------
 board/{cds => freescale}/common/cadmus.c           |    0 
 board/{cds => freescale}/common/cadmus.h           |    0 
 board/{cds => freescale}/common/eeprom.c           |    0 
 board/{cds => freescale}/common/eeprom.h           |    0 
 board/{cds => freescale}/common/ft_board.c         |    0 
 board/{cds => freescale}/common/via.c              |    0 
 board/{cds => freescale}/common/via.h              |    0 
 board/{cds => freescale}/mpc8541cds/Makefile       |    0 
 board/{cds => freescale}/mpc8541cds/config.mk      |    0 
 board/{cds => freescale}/mpc8541cds/init.S         |    0 
 board/{cds => freescale}/mpc8541cds/mpc8541cds.c   |    0 
 board/{cds => freescale}/mpc8541cds/u-boot.lds     |    4 +-
 .../mpc8541cds => freescale/mpc8548cds}/Makefile   |    0 
 board/{cds => freescale}/mpc8548cds/config.mk      |    0 
 board/{cds => freescale}/mpc8548cds/init.S         |    0 
 board/{cds => freescale}/mpc8548cds/mpc8548cds.c   |    0 
 board/{cds => freescale}/mpc8548cds/u-boot.lds     |    4 +-
 .../mpc8541cds => freescale/mpc8555cds}/Makefile   |    0 
 board/{cds => freescale}/mpc8555cds/config.mk      |    0 
 .../mpc8541cds => freescale/mpc8555cds}/init.S     |    0 
 board/{cds => freescale}/mpc8555cds/mpc8555cds.c   |    0 
 .../mpc8541cds => freescale/mpc8555cds}/u-boot.lds |    4 +-
 27 files changed, 9 insertions(+), 534 deletions(-)
 delete mode 100644 board/cds/mpc8548cds/Makefile
 delete mode 100644 board/cds/mpc8555cds/Makefile
 delete mode 100644 board/cds/mpc8555cds/init.S
 delete mode 100644 board/cds/mpc8555cds/u-boot.lds
 rename board/{cds => freescale}/common/cadmus.c (100%)
 rename board/{cds => freescale}/common/cadmus.h (100%)
 rename board/{cds => freescale}/common/eeprom.c (100%)
 rename board/{cds => freescale}/common/eeprom.h (100%)
 rename board/{cds => freescale}/common/ft_board.c (100%)
 rename board/{cds => freescale}/common/via.c (100%)
 rename board/{cds => freescale}/common/via.h (100%)
 copy board/{cds => freescale}/mpc8541cds/Makefile (100%)
 rename board/{cds => freescale}/mpc8541cds/config.mk (100%)
 copy board/{cds => freescale}/mpc8541cds/init.S (100%)
 rename board/{cds => freescale}/mpc8541cds/mpc8541cds.c (100%)
 copy board/{cds => freescale}/mpc8541cds/u-boot.lds (97%)
 copy board/{cds/mpc8541cds => freescale/mpc8548cds}/Makefile (100%)
 rename board/{cds => freescale}/mpc8548cds/config.mk (100%)
 rename board/{cds => freescale}/mpc8548cds/init.S (100%)
 rename board/{cds => freescale}/mpc8548cds/mpc8548cds.c (100%)
 rename board/{cds => freescale}/mpc8548cds/u-boot.lds (97%)
 rename board/{cds/mpc8541cds => freescale/mpc8555cds}/Makefile (100%)
 rename board/{cds => freescale}/mpc8555cds/config.mk (100%)
 rename board/{cds/mpc8541cds => freescale/mpc8555cds}/init.S (100%)
 rename board/{cds => freescale}/mpc8555cds/mpc8555cds.c (100%)
 rename board/{cds/mpc8541cds => freescale/mpc8555cds}/u-boot.lds (97%)

diff --git a/Makefile b/Makefile
index 92632b9..a0f35df 100644
--- a/Makefile
+++ b/Makefile
@@ -1945,7 +1945,7 @@ MPC8541CDS_config:	unconfig
 		echo "#define CONFIG_LEGACY" >>$(obj)include/config.h ; \
 		echo "... legacy" ; \
 	fi
-	@$(MKCONFIG) -a MPC8541CDS ppc mpc85xx mpc8541cds cds
+	@$(MKCONFIG) -a MPC8541CDS ppc mpc85xx mpc8541cds freescale
 
 MPC8544DS_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc85xx mpc8544ds freescale
@@ -1958,7 +1958,7 @@ MPC8548CDS_config:	unconfig
 		echo "#define CONFIG_LEGACY" >>$(obj)include/config.h ; \
 		echo "... legacy" ; \
 	fi
-	@$(MKCONFIG) -a MPC8548CDS ppc mpc85xx mpc8548cds cds
+	@$(MKCONFIG) -a MPC8548CDS ppc mpc85xx mpc8548cds freescale
 
 MPC8555CDS_legacy_config \
 MPC8555CDS_config:	unconfig
@@ -1968,7 +1968,7 @@ MPC8555CDS_config:	unconfig
 		echo "#define CONFIG_LEGACY" >>$(obj)include/config.h ; \
 		echo "... legacy" ; \
 	fi
-	@$(MKCONFIG) -a MPC8555CDS ppc mpc85xx mpc8555cds cds
+	@$(MKCONFIG) -a MPC8555CDS ppc mpc85xx mpc8555cds freescale
 
 MPC8568MDS_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc85xx mpc8568mds freescale
diff --git a/board/cds/mpc8548cds/Makefile b/board/cds/mpc8548cds/Makefile
deleted file mode 100644
index 7f53098..0000000
--- a/board/cds/mpc8548cds/Makefile
+++ /dev/null
@@ -1,60 +0,0 @@
-#
-# Copyright 2004 Freescale Semiconductor.
-# (C) Copyright 2001-2006
-# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-ifneq ($(OBJTREE),$(SRCTREE))
-$(shell mkdir -p $(obj)../common)
-endif
-
-LIB	= $(obj)lib$(BOARD).a
-
-COBJS	:= $(BOARD).o \
-	   ../common/cadmus.o \
-	   ../common/eeprom.o \
-	   ../common/ft_board.o \
-	   ../common/via.o
-
-SOBJS	:= init.o
-
-SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS	:= $(addprefix $(obj),$(COBJS))
-SOBJS	:= $(addprefix $(obj),$(SOBJS))
-
-$(LIB):	$(obj).depend $(OBJS) $(SOBJS)
-	$(AR) $(ARFLAGS) $@ $(OBJS)
-
-clean:
-	rm -f $(OBJS) $(SOBJS)
-
-distclean:	clean
-	rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
diff --git a/board/cds/mpc8555cds/Makefile b/board/cds/mpc8555cds/Makefile
deleted file mode 100644
index 7f53098..0000000
--- a/board/cds/mpc8555cds/Makefile
+++ /dev/null
@@ -1,60 +0,0 @@
-#
-# Copyright 2004 Freescale Semiconductor.
-# (C) Copyright 2001-2006
-# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-ifneq ($(OBJTREE),$(SRCTREE))
-$(shell mkdir -p $(obj)../common)
-endif
-
-LIB	= $(obj)lib$(BOARD).a
-
-COBJS	:= $(BOARD).o \
-	   ../common/cadmus.o \
-	   ../common/eeprom.o \
-	   ../common/ft_board.o \
-	   ../common/via.o
-
-SOBJS	:= init.o
-
-SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS	:= $(addprefix $(obj),$(COBJS))
-SOBJS	:= $(addprefix $(obj),$(SOBJS))
-
-$(LIB):	$(obj).depend $(OBJS) $(SOBJS)
-	$(AR) $(ARFLAGS) $@ $(OBJS)
-
-clean:
-	rm -f $(OBJS) $(SOBJS)
-
-distclean:	clean
-	rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
diff --git a/board/cds/mpc8555cds/init.S b/board/cds/mpc8555cds/init.S
deleted file mode 100644
index 978bda5..0000000
--- a/board/cds/mpc8555cds/init.S
+++ /dev/null
@@ -1,255 +0,0 @@
-/*
- * Copyright 2004 Freescale Semiconductor.
- * Copyright 2002,2003, Motorola Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <ppc_asm.tmpl>
-#include <ppc_defs.h>
-#include <asm/cache.h>
-#include <asm/mmu.h>
-#include <config.h>
-#include <mpc85xx.h>
-
-
-/*
- * TLB0 and TLB1 Entries
- *
- * Out of reset, TLB1's Entry 0 maps the highest 4K for CCSRBAR.
- * However, CCSRBAR is then relocated to CFG_CCSRBAR right after
- * these TLB entries are established.
- *
- * The TLB entries for DDR are dynamically setup in spd_sdram()
- * and use TLB1 Entries 8 through 15 as needed according to the
- * size of DDR memory.
- *
- * MAS0: tlbsel, esel, nv
- * MAS1: valid, iprot, tid, ts, tsize
- * MAS2: epn, sharen, x0, x1, w, i, m, g, e
- * MAS3: rpn, u0-u3, ux, sx, uw, sw, ur, sr
- */
-
-#define	entry_start \
-	mflr	r1 	;	\
-	bl	0f 	;
-
-#define	entry_end \
-0:	mflr	r0	;	\
-	mtlr	r1	;	\
-	blr		;
-
-
-	.section	.bootpg, "ax"
-	.globl	tlb1_entry
-tlb1_entry:
-	entry_start
-
-	/*
-	 * Number of TLB0 and TLB1 entries in the following table
-	 */
-	.long 13
-
-#if (CFG_CCSRBAR_DEFAULT != CFG_CCSRBAR)
-	/*
-	 * TLB0		4K	Non-cacheable, guarded
-	 * 0xff700000	4K	Initial CCSRBAR mapping
-	 *
-	 * This ends up at a TLB0 Index==0 entry, and must not collide
-	 * with other TLB0 Entries.
-	 */
-	.long TLB1_MAS0(0, 0, 0)
-	.long TLB1_MAS1(1, 0, 0, 0, 0)
-	.long TLB1_MAS2(E500_TLB_EPN(CFG_CCSRBAR_DEFAULT), 0,0,0,0,1,0,1,0)
-	.long TLB1_MAS3(E500_TLB_RPN(CFG_CCSRBAR_DEFAULT), 0,0,0,0,0,1,0,1,0,1)
-#else
-#error("Update the number of table entries in tlb1_entry")
-#endif
-
-	/*
-	 * TLB0		16K	Cacheable, non-guarded
-	 * 0xd001_0000	16K	Temporary Global data for initialization
-	 *
-	 * Use four 4K TLB0 entries.  These entries must be cacheable
-	 * as they provide the bootstrap memory before the memory
-	 * controler and real memory have been configured.
-	 *
-	 * These entries end up at TLB0 Indicies 0x10, 0x14, 0x18 and 0x1c,
-	 * and must not collide with other TLB0 entries.
-	 */
-	.long TLB1_MAS0(0, 0, 0)
-	.long TLB1_MAS1(1, 0, 0, 0, 0)
-	.long TLB1_MAS2(E500_TLB_EPN(CFG_INIT_RAM_ADDR),
-			0,0,0,0,0,0,0,0)
-	.long TLB1_MAS3(E500_TLB_RPN(CFG_INIT_RAM_ADDR),
-			0,0,0,0,0,1,0,1,0,1)
-
-	.long TLB1_MAS0(0, 0, 0)
-	.long TLB1_MAS1(1, 0, 0, 0, 0)
-	.long TLB1_MAS2(E500_TLB_EPN(CFG_INIT_RAM_ADDR + 4 * 1024),
-			0,0,0,0,0,0,0,0)
-	.long TLB1_MAS3(E500_TLB_RPN(CFG_INIT_RAM_ADDR + 4 * 1024),
-			0,0,0,0,0,1,0,1,0,1)
-
-	.long TLB1_MAS0(0, 0, 0)
-	.long TLB1_MAS1(1, 0, 0, 0, 0)
-	.long TLB1_MAS2(E500_TLB_EPN(CFG_INIT_RAM_ADDR + 8 * 1024),
-			0,0,0,0,0,0,0,0)
-	.long TLB1_MAS3(E500_TLB_RPN(CFG_INIT_RAM_ADDR + 8 * 1024),
-			0,0,0,0,0,1,0,1,0,1)
-
-	.long TLB1_MAS0(0, 0, 0)
-	.long TLB1_MAS1(1, 0, 0, 0, 0)
-	.long TLB1_MAS2(E500_TLB_EPN(CFG_INIT_RAM_ADDR + 12 * 1024),
-			0,0,0,0,0,0,0,0)
-	.long TLB1_MAS3(E500_TLB_RPN(CFG_INIT_RAM_ADDR + 12 * 1024),
-			0,0,0,0,0,1,0,1,0,1)
-
-
-	/*
-	 * TLB 0:	16M	Non-cacheable, guarded
-	 * 0xff000000	16M	FLASH
-	 * Out of reset this entry is only 4K.
-	 */
-	.long TLB1_MAS0(1, 0, 0)
-	.long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_16M)
-	.long TLB1_MAS2(E500_TLB_EPN(CFG_FLASH_BASE), 0,0,0,0,1,0,1,0)
-	.long TLB1_MAS3(E500_TLB_RPN(CFG_FLASH_BASE), 0,0,0,0,0,1,0,1,0,1)
-
-	/*
-	 * TLB 1:	256M	Non-cacheable, guarded
-	 * 0x80000000	256M	PCI1 MEM First half
-	 */
-	.long TLB1_MAS0(1, 1, 0)
-	.long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M)
-	.long TLB1_MAS2(E500_TLB_EPN(CFG_PCI1_MEM_BASE), 0,0,0,0,1,0,1,0)
-	.long TLB1_MAS3(E500_TLB_RPN(CFG_PCI1_MEM_BASE), 0,0,0,0,0,1,0,1,0,1)
-
-	/*
-	 * TLB 2:	256M	Non-cacheable, guarded
-	 * 0x90000000	256M	PCI1 MEM Second half
-	 */
-	.long TLB1_MAS0(1, 2, 0)
-	.long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M)
-	.long TLB1_MAS2(E500_TLB_EPN(CFG_PCI1_MEM_BASE + 0x10000000),
-			0,0,0,0,1,0,1,0)
-	.long TLB1_MAS3(E500_TLB_RPN(CFG_PCI1_MEM_BASE + 0x10000000),
-			0,0,0,0,0,1,0,1,0,1)
-
-	/*
-	 * TLB 3:	256M	Non-cacheable, guarded
-	 * 0xa0000000	256M	PCI2 MEM First half
-	 */
-	.long TLB1_MAS0(1, 3, 0)
-	.long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M)
-	.long TLB1_MAS2(E500_TLB_EPN(CFG_PCI2_MEM_BASE), 0,0,0,0,1,0,1,0)
-	.long TLB1_MAS3(E500_TLB_RPN(CFG_PCI2_MEM_BASE), 0,0,0,0,0,1,0,1,0,1)
-
-	/*
-	 * TLB 4:	256M	Non-cacheable, guarded
-	 * 0xb0000000	256M	PCI2 MEM Second half
-	 */
-	.long TLB1_MAS0(1, 4, 0)
-	.long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M)
-	.long TLB1_MAS2(E500_TLB_EPN(CFG_PCI2_MEM_BASE + 0x10000000),
-			0,0,0,0,1,0,1,0)
-	.long TLB1_MAS3(E500_TLB_RPN(CFG_PCI2_MEM_BASE + 0x10000000),
-			0,0,0,0,0,1,0,1,0,1)
-
-	/*
-	 * TLB 5:	64M	Non-cacheable, guarded
-	 * 0xe000_0000	1M	CCSRBAR
-	 * 0xe200_0000	16M	PCI1 IO
-	 * 0xe300_0000	16M	PCI2 IO
-	 */
-	.long TLB1_MAS0(1, 5, 0)
-	.long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_64M)
-	.long TLB1_MAS2(E500_TLB_EPN(CFG_CCSRBAR), 0,0,0,0,1,0,1,0)
-	.long TLB1_MAS3(E500_TLB_RPN(CFG_CCSRBAR), 0,0,0,0,0,1,0,1,0,1)
-
-	/*
-	 * TLB 6:	64M	Cacheable, non-guarded
-	 * 0xf000_0000	64M	LBC SDRAM
-	 */
-	.long TLB1_MAS0(1, 6, 0)
-	.long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_64M)
-	.long TLB1_MAS2(E500_TLB_EPN(CFG_LBC_SDRAM_BASE), 0,0,0,0,0,0,0,0)
-	.long TLB1_MAS3(E500_TLB_RPN(CFG_LBC_SDRAM_BASE), 0,0,0,0,0,1,0,1,0,1)
-
-	/*
-	 * TLB 7:	1M	Non-cacheable, guarded
-	 * 0xf8000000	1M	CADMUS registers
-	 */
-	.long TLB1_MAS0(1, 7, 0)
-	.long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_1M)
-	.long TLB1_MAS2(E500_TLB_EPN(CADMUS_BASE_ADDR), 0,0,0,0,1,0,1,0)
-	.long TLB1_MAS3(E500_TLB_RPN(CADMUS_BASE_ADDR), 0,0,0,0,0,1,0,1,0,1)
-
-	entry_end
-
-/*
- * LAW(Local Access Window) configuration:
- *
- * 0x0000_0000     0x7fff_ffff     DDR                     2G
- * 0x8000_0000     0x9fff_ffff     PCI1 MEM                512M
- * 0xa000_0000     0xbfff_ffff     PCI2 MEM                512M
- * 0xe000_0000     0xe000_ffff     CCSR                    1M
- * 0xe200_0000     0xe20f_ffff     PCI1 IO                 1M
- * 0xe210_0000     0xe21f_ffff     PCI2 IO                 1M
- * 0xf000_0000     0xf7ff_ffff     SDRAM                   128M
- * 0xf800_0000     0xf80f_ffff     NVRAM/CADMUS (*)        1M
- * 0xff00_0000     0xff7f_ffff     FLASH (2nd bank)        8M
- * 0xff80_0000     0xffff_ffff     FLASH (boot bank)       8M
- *
- * Notes:
- *    CCSRBAR and L2-as-SRAM don't need a configured Local Access Window.
- *    If flash is 8M at default position (last 8M), no LAW needed.
- *
- * The defines below are 1-off of the actual LAWAR0 usage.
- * So LAWAR3 define uses the LAWAR4 register in the ECM.
- */
-
-#define LAWBAR0 0
-#define LAWAR0  ((LAWAR_TRGT_IF_DDR | (LAWAR_SIZE & LAWAR_SIZE_128M)) & ~LAWAR_EN)
-
-#define LAWBAR1 ((CFG_PCI1_MEM_BASE>>12) & 0xfffff)
-#define LAWAR1 	(LAWAR_EN | LAWAR_TRGT_IF_PCI1 | (LAWAR_SIZE & LAWAR_SIZE_512M))
-
-#define LAWBAR2 ((CFG_PCI2_MEM_BASE>>12) & 0xfffff)
-#define LAWAR2 	(LAWAR_EN | LAWAR_TRGT_IF_PCI2 | (LAWAR_SIZE & LAWAR_SIZE_512M))
-
-#define LAWBAR3 ((CFG_PCI1_IO_PHYS>>12) & 0xfffff)
-#define LAWAR3 	(LAWAR_EN | LAWAR_TRGT_IF_PCI1 | (LAWAR_SIZE & LAWAR_SIZE_1M))
-
-#define LAWBAR4 ((CFG_PCI2_IO_PHYS>>12) & 0xfffff)
-#define LAWAR4 	(LAWAR_EN | LAWAR_TRGT_IF_PCI2 | (LAWAR_SIZE & LAWAR_SIZE_1M))
-
-/* LBC window - maps 256M 0xf0000000 -> 0xffffffff */
-#define LAWBAR5 ((CFG_LBC_SDRAM_BASE>>12) & 0xfffff)
-#define LAWAR5 	(LAWAR_EN | LAWAR_TRGT_IF_LBC | (LAWAR_SIZE & LAWAR_SIZE_256M))
-
-	.section .bootpg, "ax"
-	.globl	law_entry
-
-law_entry:
-	entry_start
-	.long 6
-	.long LAWBAR0,LAWAR0,LAWBAR1,LAWAR1,LAWBAR2,LAWAR2,LAWBAR3,LAWAR3
-	.long LAWBAR4,LAWAR4,LAWBAR5,LAWAR5
-	entry_end
diff --git a/board/cds/mpc8555cds/u-boot.lds b/board/cds/mpc8555cds/u-boot.lds
deleted file mode 100644
index de0923a..0000000
--- a/board/cds/mpc8555cds/u-boot.lds
+++ /dev/null
@@ -1,150 +0,0 @@
-/*
- * Copyright 2004 Freescale Semiconductor.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
-   __DYNAMIC = 0;    */
-SECTIONS
-{
-  .resetvec 0xFFFFFFFC :
-  {
-    *(.resetvec)
-  } = 0xffff
-
-  .bootpg 0xFFFFF000 :
-  {
-    cpu/mpc85xx/start.o	(.bootpg)
-    board/cds/mpc8555cds/init.o (.bootpg)
-  } = 0xffff
-
-  /* Read-only sections, merged into text segment: */
-  . = + SIZEOF_HEADERS;
-  .interp : { *(.interp) }
-  .hash          : { *(.hash)		}
-  .dynsym        : { *(.dynsym)		}
-  .dynstr        : { *(.dynstr)		}
-  .rel.text      : { *(.rel.text)		}
-  .rela.text     : { *(.rela.text) 	}
-  .rel.data      : { *(.rel.data)		}
-  .rela.data     : { *(.rela.data) 	}
-  .rel.rodata    : { *(.rel.rodata) 	}
-  .rela.rodata   : { *(.rela.rodata) 	}
-  .rel.got       : { *(.rel.got)		}
-  .rela.got      : { *(.rela.got)		}
-  .rel.ctors     : { *(.rel.ctors)	}
-  .rela.ctors    : { *(.rela.ctors)	}
-  .rel.dtors     : { *(.rel.dtors)	}
-  .rela.dtors    : { *(.rela.dtors)	}
-  .rel.bss       : { *(.rel.bss)		}
-  .rela.bss      : { *(.rela.bss)		}
-  .rel.plt       : { *(.rel.plt)		}
-  .rela.plt      : { *(.rela.plt)		}
-  .init          : { *(.init)	}
-  .plt : { *(.plt) }
-  .text      :
-  {
-    cpu/mpc85xx/start.o	(.text)
-    board/cds/mpc8555cds/init.o (.text)
-    cpu/mpc85xx/traps.o (.text)
-    cpu/mpc85xx/interrupts.o (.text)
-    cpu/mpc85xx/cpu_init.o (.text)
-    cpu/mpc85xx/cpu.o (.text)
-    drivers/net/tsec.o (.text)
-    cpu/mpc85xx/speed.o (.text)
-    cpu/mpc85xx/pci.o (.text)
-    common/dlmalloc.o (.text)
-    lib_generic/crc32.o (.text)
-    lib_ppc/extable.o (.text)
-    lib_generic/zlib.o (.text)
-    *(.text)
-    *(.fixup)
-    *(.got1)
-   }
-    _etext = .;
-    PROVIDE (etext = .);
-    .rodata    :
-   {
-    *(.rodata)
-    *(.rodata1)
-    *(.rodata.str1.4)
-    *(.eh_frame)
-  }
-  .fini      : { *(.fini)    } =0
-  .ctors     : { *(.ctors)   }
-  .dtors     : { *(.dtors)   }
-
-  /* Read-write section, merged into data segment: */
-  . = (. + 0x00FF) & 0xFFFFFF00;
-  _erotext = .;
-  PROVIDE (erotext = .);
-  .reloc   :
-  {
-    *(.got)
-    _GOT2_TABLE_ = .;
-    *(.got2)
-    _FIXUP_TABLE_ = .;
-    *(.fixup)
-  }
-  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
-  __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
-  .data    :
-  {
-    *(.data)
-    *(.data1)
-    *(.sdata)
-    *(.sdata2)
-    *(.dynamic)
-    CONSTRUCTORS
-  }
-  _edata  =  .;
-  PROVIDE (edata = .);
-
-  . = .;
-  __u_boot_cmd_start = .;
-  .u_boot_cmd : { *(.u_boot_cmd) }
-  __u_boot_cmd_end = .;
-
-  . = .;
-  __start___ex_table = .;
-  __ex_table : { *(__ex_table) }
-  __stop___ex_table = .;
-
-  . = ALIGN(256);
-  __init_begin = .;
-  .text.init : { *(.text.init) }
-  .data.init : { *(.data.init) }
-  . = ALIGN(256);
-  __init_end = .;
-
-  __bss_start = .;
-  .bss       :
-  {
-   *(.sbss) *(.scommon)
-   *(.dynbss)
-   *(.bss)
-   *(COMMON)
-  }
-  _end = . ;
-  PROVIDE (end = .);
-}
diff --git a/board/cds/common/cadmus.c b/board/freescale/common/cadmus.c
similarity index 100%
rename from board/cds/common/cadmus.c
rename to board/freescale/common/cadmus.c
diff --git a/board/cds/common/cadmus.h b/board/freescale/common/cadmus.h
similarity index 100%
rename from board/cds/common/cadmus.h
rename to board/freescale/common/cadmus.h
diff --git a/board/cds/common/eeprom.c b/board/freescale/common/eeprom.c
similarity index 100%
rename from board/cds/common/eeprom.c
rename to board/freescale/common/eeprom.c
diff --git a/board/cds/common/eeprom.h b/board/freescale/common/eeprom.h
similarity index 100%
rename from board/cds/common/eeprom.h
rename to board/freescale/common/eeprom.h
diff --git a/board/cds/common/ft_board.c b/board/freescale/common/ft_board.c
similarity index 100%
rename from board/cds/common/ft_board.c
rename to board/freescale/common/ft_board.c
diff --git a/board/cds/common/via.c b/board/freescale/common/via.c
similarity index 100%
rename from board/cds/common/via.c
rename to board/freescale/common/via.c
diff --git a/board/cds/common/via.h b/board/freescale/common/via.h
similarity index 100%
rename from board/cds/common/via.h
rename to board/freescale/common/via.h
diff --git a/board/cds/mpc8541cds/Makefile b/board/freescale/mpc8541cds/Makefile
similarity index 100%
copy from board/cds/mpc8541cds/Makefile
copy to board/freescale/mpc8541cds/Makefile
diff --git a/board/cds/mpc8541cds/config.mk b/board/freescale/mpc8541cds/config.mk
similarity index 100%
rename from board/cds/mpc8541cds/config.mk
rename to board/freescale/mpc8541cds/config.mk
diff --git a/board/cds/mpc8541cds/init.S b/board/freescale/mpc8541cds/init.S
similarity index 100%
copy from board/cds/mpc8541cds/init.S
copy to board/freescale/mpc8541cds/init.S
diff --git a/board/cds/mpc8541cds/mpc8541cds.c b/board/freescale/mpc8541cds/mpc8541cds.c
similarity index 100%
rename from board/cds/mpc8541cds/mpc8541cds.c
rename to board/freescale/mpc8541cds/mpc8541cds.c
diff --git a/board/cds/mpc8541cds/u-boot.lds b/board/freescale/mpc8541cds/u-boot.lds
similarity index 97%
copy from board/cds/mpc8541cds/u-boot.lds
copy to board/freescale/mpc8541cds/u-boot.lds
index 7a5daef..4360d67 100644
--- a/board/cds/mpc8541cds/u-boot.lds
+++ b/board/freescale/mpc8541cds/u-boot.lds
@@ -34,7 +34,7 @@ SECTIONS
   .bootpg 0xFFFFF000 :
   {
     cpu/mpc85xx/start.o	(.bootpg)
-    board/cds/mpc8541cds/init.o (.bootpg)
+    board/freescale/mpc8541cds/init.o (.bootpg)
   } = 0xffff
 
   /* Read-only sections, merged into text segment: */
@@ -64,7 +64,7 @@ SECTIONS
   .text      :
   {
     cpu/mpc85xx/start.o	(.text)
-    board/cds/mpc8541cds/init.o (.text)
+    board/freescale/mpc8541cds/init.o (.text)
     cpu/mpc85xx/traps.o (.text)
     cpu/mpc85xx/interrupts.o (.text)
     cpu/mpc85xx/cpu_init.o (.text)
diff --git a/board/cds/mpc8541cds/Makefile b/board/freescale/mpc8548cds/Makefile
similarity index 100%
copy from board/cds/mpc8541cds/Makefile
copy to board/freescale/mpc8548cds/Makefile
diff --git a/board/cds/mpc8548cds/config.mk b/board/freescale/mpc8548cds/config.mk
similarity index 100%
rename from board/cds/mpc8548cds/config.mk
rename to board/freescale/mpc8548cds/config.mk
diff --git a/board/cds/mpc8548cds/init.S b/board/freescale/mpc8548cds/init.S
similarity index 100%
rename from board/cds/mpc8548cds/init.S
rename to board/freescale/mpc8548cds/init.S
diff --git a/board/cds/mpc8548cds/mpc8548cds.c b/board/freescale/mpc8548cds/mpc8548cds.c
similarity index 100%
rename from board/cds/mpc8548cds/mpc8548cds.c
rename to board/freescale/mpc8548cds/mpc8548cds.c
diff --git a/board/cds/mpc8548cds/u-boot.lds b/board/freescale/mpc8548cds/u-boot.lds
similarity index 97%
rename from board/cds/mpc8548cds/u-boot.lds
rename to board/freescale/mpc8548cds/u-boot.lds
index b19c481..ee772d3 100644
--- a/board/cds/mpc8548cds/u-boot.lds
+++ b/board/freescale/mpc8548cds/u-boot.lds
@@ -34,7 +34,7 @@ SECTIONS
   .bootpg 0xFFFFF000 :
   {
     cpu/mpc85xx/start.o	(.bootpg)
-    board/cds/mpc8548cds/init.o (.bootpg)
+    board/freescale/mpc8548cds/init.o (.bootpg)
   } = 0xffff
 
   /* Read-only sections, merged into text segment: */
@@ -64,7 +64,7 @@ SECTIONS
   .text      :
   {
     cpu/mpc85xx/start.o	(.text)
-    board/cds/mpc8548cds/init.o (.text)
+    board/freescale/mpc8548cds/init.o (.text)
     cpu/mpc85xx/traps.o (.text)
     cpu/mpc85xx/interrupts.o (.text)
     cpu/mpc85xx/cpu_init.o (.text)
diff --git a/board/cds/mpc8541cds/Makefile b/board/freescale/mpc8555cds/Makefile
similarity index 100%
rename from board/cds/mpc8541cds/Makefile
rename to board/freescale/mpc8555cds/Makefile
diff --git a/board/cds/mpc8555cds/config.mk b/board/freescale/mpc8555cds/config.mk
similarity index 100%
rename from board/cds/mpc8555cds/config.mk
rename to board/freescale/mpc8555cds/config.mk
diff --git a/board/cds/mpc8541cds/init.S b/board/freescale/mpc8555cds/init.S
similarity index 100%
rename from board/cds/mpc8541cds/init.S
rename to board/freescale/mpc8555cds/init.S
diff --git a/board/cds/mpc8555cds/mpc8555cds.c b/board/freescale/mpc8555cds/mpc8555cds.c
similarity index 100%
rename from board/cds/mpc8555cds/mpc8555cds.c
rename to board/freescale/mpc8555cds/mpc8555cds.c
diff --git a/board/cds/mpc8541cds/u-boot.lds b/board/freescale/mpc8555cds/u-boot.lds
similarity index 97%
rename from board/cds/mpc8541cds/u-boot.lds
rename to board/freescale/mpc8555cds/u-boot.lds
index 7a5daef..df21ea8 100644
--- a/board/cds/mpc8541cds/u-boot.lds
+++ b/board/freescale/mpc8555cds/u-boot.lds
@@ -34,7 +34,7 @@ SECTIONS
   .bootpg 0xFFFFF000 :
   {
     cpu/mpc85xx/start.o	(.bootpg)
-    board/cds/mpc8541cds/init.o (.bootpg)
+    board/freescale/mpc8555cds/init.o (.bootpg)
   } = 0xffff
 
   /* Read-only sections, merged into text segment: */
@@ -64,7 +64,7 @@ SECTIONS
   .text      :
   {
     cpu/mpc85xx/start.o	(.text)
-    board/cds/mpc8541cds/init.o (.text)
+    board/freescale/mpc8555cds/init.o (.text)
     cpu/mpc85xx/traps.o (.text)
     cpu/mpc85xx/interrupts.o (.text)
     cpu/mpc85xx/cpu_init.o (.text)
-- 
1.5.3.4





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