[U-Boot-Users] Symptoms of a 85xx hardware problem, what could be the cause?

[robert lazarski]

Hi all,

We've been stuck for about 3 weeks trying to run u-boot on our custom
8548 board. Its failing in the generic start.S code, independent of
what TLB's we have. We've tracked this down to be hardware, but after
much head scratching and many official support contacts, we are
without any solid theories on the cause.

On the 8548 CDS board,  we've been able to load the same code up until
where the start.S TLB loop completes via the BDI and 'load', ie, in
memory:

cds8548>load
Loading E:/temp/dump.bin , please wait ....
Loading program file passed
cds8548>verify
Verifying E:/temp/dump.bin , please wait ....
Verifying target memory passed
cds8548>bi 0xfffff0f4
Breakpoint identification is 0
cds8548>go 0xfffff000
- TARGET: core #0 has entered debug mode
cds8548>info
   Target CPU        : MPC85xx (e500v2 rev.2)
   Core state        : halted
   Debug entry cause : instruction breakpoint
   Current PC        : 0xfffff0f4
   Current CR        : 0x00000000
   Current MSR       : 0x00000200
   Current LR        : 0xfffff0b4
   Current CCSRBAR   : 0x0_ff700000
cds8548>
cds8548>l2cam 0 15
IDX  PID      EPN  SIZE V TS           RPN U0-U3 WIMGE UUUSSS
 0 : 00 fc000000  64MB V  0 -> 0_fc000000  0000 -I-G- ---RWX
 1 : 00 f8000000  64MB V  0 -> 0_f8000000  0000 -I-G- ---RWX
 2 : 00 80000000   1GB V  0 -> 0_80000000  0000 -I-G- ---RWX
 3 : 00 c0000000 256MB V  0 -> 0_c0000000  0000 -I-G- ---RWX
 4 : 00 d0000000 256MB V  0 -> 0_d0000000  0000 -I-G- ---RWX
 5 : 00 e0000000  64MB V  0 -> 0_e0000000  0000 -I-G- ---RWX
 6 : c5 82c78000  64MB -  1 -> c_fb779000  1101 -I-GE ----W-
 7 : 57 54d8f000   1TB -  0 -> 4_ffaff000  0100 -I--E -WXR-X
 8 : 6a 089af000  64GB -  0 -> 5_b5123000  1001 W-M-E -W---X
 9 : 5b 64ba2000  64GB -  1 -> 2_c7e59000  1111 ----- --XRW-
 10 : a1 8e25e000  64MB -  1 -> 0_27e74000  1000 WI-G- RWXRWX
 11 : 07 7a8b3000  16GB -  0 -> 4_6f030000  1111 -I-G- --X-W-
 12 : 98 df40d000  64KB -  1 -> 9_d46b9000  0001 -IMGE RWXRWX
 13 : 62 94e78000  64MB -  1 -> c_b7ba8000  1110 WI--E --X--X
 14 : cb 9cc65000 256MB -  0 -> 1_8a73f000  0010 W--GE -----X
 15 : 57 31338000   1TB -  1 -> 8_a323b000  0100 WI-G- R----X
cds8548>

Where 0xfffff0f4 is:

180         lis     r4,CFG_CCSRBAR_DEFAULT at h

On our custom hardware running the same u-boot code that ran fine on
CDS, we get a crash when simply assigning the number of TLB's before
the loop. We've tried only one TLB and simpler code, but nothing is
working.

When running from L2SRAM, as the above example show's CDS running just
fine, on our custom hardware we cannot assign the values from the
registers r6-r9 to the MAS0-MAS3 and then the code crashes in the
start.S TLB loop.

The crash from flash might indicate a problem with our external memory
controller, but the fact that the same code that runs fine on the CDS
board via 'load' from memory while not able to assign values to the
MAS0-MAS3 memory is leaving us in doubt what could be the cause.

Any suggestions highly appreciated,
Robert