[U-Boot-Users] [PATCH] patch for rtl8139.c, base version is u-boot-1.1.6

[Lucas Jin]

--- ./drivers/rtl8139.c.orig	2007-10-12 22:17:52.000000000 +0800
+++ ./drivers/rtl8139.c	2007-10-12 22:39:21.170169464 +0800
@@ -76,6 +76,7 @@
 #include <net.h>
 #include <asm/io.h>
 #include <pci.h>
+#include <linux/byteorder/generic.h>
 
 #if (CONFIG_COMMANDS & CFG_CMD_NET) && defined(CONFIG_NET_MULTI) && \
 	defined(CONFIG_RTL8139)
@@ -104,8 +105,8 @@
 #undef DEBUG_RX
 
 #define currticks()	get_timer(0)
-#define bus_to_phys(a)	pci_mem_to_phys((pci_dev_t)dev->priv, a)
-#define phys_to_bus(a)	pci_phys_to_mem((pci_dev_t)dev->priv, a)
+#define bus_to_phys(a)	pci_io_to_phys((pci_dev_t)dev->priv, a)
+#define phys_to_bus(a)	pci_phys_to_io((pci_dev_t)dev->priv, a)
 
 /* Symbolic offsets to registers. */
 enum RTL8139_registers {
@@ -213,7 +214,7 @@
 		if ((devno = pci_find_devices(supported, idx++)) < 0)
 			break;
 
-		pci_read_config_dword(devno, PCI_BASE_ADDRESS_1, &iobase);
+		pci_read_config_dword(devno, PCI_BASE_ADDRESS_0, &iobase);
 		iobase &= ~0xf;
 
 		debug ("rtl8139: REALTEK RTL8139 @0x%x\n", iobase);
@@ -254,8 +255,9 @@
 	outb(0x00, ioaddr + Config1);
 
 	addr_len = read_eeprom(0,8) == 0x8129 ? 8 : 6;
-	for (i = 0; i < 3; i++)
-		*ap++ = le16_to_cpu (read_eeprom(i + 7, addr_len));
+	//this doesn't work
+	//for (i = 0; i < 3; i++)
+	//	*ap++ = le16_to_cpu (read_eeprom(i + 7, addr_len));
 
 	speed10 = inb(ioaddr + MediaStatus) & MSRSpeed10;
 	fullduplex = inw(ioaddr + MII_BMCR) & BMCRDuplex;
@@ -338,7 +340,7 @@
 	unsigned int mc_filter[2];
 	int rx_mode;
 	/* !IFF_PROMISC */
-	rx_mode = AcceptBroadcast | AcceptMulticast | AcceptMyPhys;
+	rx_mode = AcceptBroadcast | AcceptMulticast | AcceptMyPhys | AcceptAllPhys;
 	mc_filter[1] = mc_filter[0] = 0xffffffff;
 
 	outl(rtl8139_rx_config | rx_mode, ioaddr + RxConfig);
@@ -383,7 +385,7 @@
 #ifdef	DEBUG_RX
 	printf("rx ring address is %X\n",(unsigned long)rx_ring);
 #endif
-	outl(phys_to_bus((int)rx_ring), ioaddr + RxBuf);
+	outl((int)rx_ring, ioaddr + RxBuf);
 
 	/* If we add multicast support, the MAR0 register would have to be
 	 * initialized to 0xffffffffffffffff (two 32 bit accesses).  Etherboot
@@ -423,7 +425,7 @@
 		tx_buffer[len++] = '\0';
 	}
 
-	outl(phys_to_bus((int)tx_buffer), ioaddr + TxAddr0 + cur_tx*4);
+	outl((int)tx_buffer, ioaddr + TxAddr0 + cur_tx*4);
 	outl(((TX_FIFO_THRESH<<11) & 0x003f0000) | len,
 		ioaddr + TxStatus0 + cur_tx*4);
 
@@ -480,7 +482,7 @@
 #endif
 
 	ring_offs = cur_rx % RX_BUF_LEN;
-	rx_status = *(unsigned int*)KSEG1ADDR((rx_ring + ring_offs));
+	rx_status = le32_to_cpu(*(unsigned int*)(rx_ring + ring_offs));
 	rx_size = rx_status >> 16;
 	rx_status &= 0xffff;
  				
--------------
Lucas Jin