[U-Boot-Users] Possible bug in PPC4xx dcache() function

[Larry Johnson]

Greetings!

If I call the dflush() function in cpu/ppc4xx/start.S on a PPC440EPx as
part of initializing SDRAM, I later get the error

    The value of DVLIM special register is incorrect: 0x00000000

from spr_post_test().  I can make the spr_post_test() error message go
away by applying the patch

--- a/cpu/ppc4xx/start.S
+++ b/cpu/ppc4xx/start.S
@@ -1711,6 +1711,7 @@ trap_reloc:
 	rlwinm	r8,r9,0,15,13
 	rlwinm	r8,r8,0,17,15
 	mtmsr	r8
+	mfspr	r8,dvlim
 	addi	r3,r0,0x0000
 	mtspr	dvlim,r3
 	mfspr	r3,ivpr
@@ -1725,6 +1726,7 @@ trap_reloc:
 ..ag:	dcbf	r0,r3
 	addi	r3,r3,-32
 	bdnz	..ag
+	mtspr	dvlim,r8
 	sync
 	mtmsr	r9
 	blr

The routine dflush() zeros DVLIM but does not save and restore the
original value.  Is this the intended behavior?  The patch I tried seems
safe, although I couldn't easily find the gcc function calling
conventions for PowerPC.  (Does anyone have a pointer to these?)

-- Best regards, Larry Johnson <lrj at acm.org>