[U-Boot-Users] [PATCH 1/2] PPC4xx: Cosmetic changes
Larry Johnson
lrj at arlinx.com
Tue Oct 30 15:30:57 CET 2007
Signed-off-by: Larry Johnson <lrj at acm.org>
---
common/miiphyutil.c | 141 ++++++++++++++++++++++++--------------------------
cpu/ppc4xx/miiphy.c | 58 +++++++--------------
include/miiphy.h | 92 +++++++++++++++------------------
3 files changed, 130 insertions(+), 161 deletions(-)
diff --git a/common/miiphyutil.c b/common/miiphyutil.c
index c69501f..58ebc5e 100644
--- a/common/miiphyutil.c
+++ b/common/miiphyutil.c
@@ -49,10 +49,10 @@
struct mii_dev {
struct list_head link;
char *name;
- int (* read)(char *devname, unsigned char addr,
- unsigned char reg, unsigned short *value);
- int (* write)(char *devname, unsigned char addr,
- unsigned char reg, unsigned short value);
+ int (*read) (char *devname, unsigned char addr,
+ unsigned char reg, unsigned short *value);
+ int (*write) (char *devname, unsigned char addr,
+ unsigned char reg, unsigned short value);
};
static struct list_head mii_devs;
@@ -62,21 +62,21 @@ static struct mii_dev *current_mii;
*
* Initialize global data. Need to be called before any other miiphy routine.
*/
-void miiphy_init()
+void miiphy_init ()
{
- INIT_LIST_HEAD(&mii_devs);
- current_mii = NULL;
+ INIT_LIST_HEAD (&mii_devs);
+ current_mii = NULL;
}
/*****************************************************************************
*
* Register read and write MII access routines for the device <name>.
*/
-void miiphy_register(char *name,
- int (* read)(char *devname, unsigned char addr,
- unsigned char reg, unsigned short *value),
- int (* write)(char *devname, unsigned char addr,
- unsigned char reg, unsigned short value))
+void miiphy_register (char *name,
+ int (*read) (char *devname, unsigned char addr,
+ unsigned char reg, unsigned short *value),
+ int (*write) (char *devname, unsigned char addr,
+ unsigned char reg, unsigned short value))
{
struct list_head *entry;
struct mii_dev *new_dev;
@@ -84,63 +84,64 @@ void miiphy_register(char *name,
unsigned int name_len;
/* check if we have unique name */
- list_for_each(entry, &mii_devs) {
- miidev = list_entry(entry, struct mii_dev, link);
- if (strcmp(miidev->name, name) == 0) {
- printf("miiphy_register: non unique device name '%s'\n",
- name);
+ list_for_each (entry, &mii_devs) {
+ miidev = list_entry (entry, struct mii_dev, link);
+ if (strcmp (miidev->name, name) == 0) {
+ printf ("miiphy_register: non unique device name "
+ "'%s'\n", name);
return;
}
}
/* allocate memory */
- name_len = strlen(name);
- new_dev = (struct mii_dev *)malloc(sizeof(struct mii_dev) + name_len + 1);
+ name_len = strlen (name);
+ new_dev =
+ (struct mii_dev *)malloc (sizeof (struct mii_dev) + name_len + 1);
- if(new_dev == NULL) {
- printf("miiphy_register: cannot allocate memory for '%s'\n",
- name);
+ if (new_dev == NULL) {
+ printf ("miiphy_register: cannot allocate memory for '%s'\n",
+ name);
return;
}
- memset(new_dev, 0, sizeof(struct mii_dev) + name_len);
+ memset (new_dev, 0, sizeof (struct mii_dev) + name_len);
/* initalize mii_dev struct fields */
- INIT_LIST_HEAD(&new_dev->link);
+ INIT_LIST_HEAD (&new_dev->link);
new_dev->read = read;
new_dev->write = write;
new_dev->name = (char *)(new_dev + 1);
- strncpy(new_dev->name, name, name_len);
+ strncpy (new_dev->name, name, name_len);
new_dev->name[name_len] = '\0';
- debug("miiphy_register: added '%s', read=0x%08lx, write=0x%08lx\n",
- new_dev->name, new_dev->read, new_dev->write);
+ debug ("miiphy_register: added '%s', read=0x%08lx, write=0x%08lx\n",
+ new_dev->name, new_dev->read, new_dev->write);
/* add it to the list */
- list_add_tail(&new_dev->link, &mii_devs);
+ list_add_tail (&new_dev->link, &mii_devs);
if (!current_mii)
current_mii = new_dev;
}
-int miiphy_set_current_dev(char *devname)
+int miiphy_set_current_dev (char *devname)
{
struct list_head *entry;
struct mii_dev *dev;
- list_for_each(entry, &mii_devs) {
- dev = list_entry(entry, struct mii_dev, link);
+ list_for_each (entry, &mii_devs) {
+ dev = list_entry (entry, struct mii_dev, link);
- if (strcmp(devname, dev->name) == 0) {
+ if (strcmp (devname, dev->name) == 0) {
current_mii = dev;
return 0;
}
}
- printf("No such device: %s\n", devname);
+ printf ("No such device: %s\n", devname);
return 1;
}
-char *miiphy_get_current_dev()
+char *miiphy_get_current_dev ()
{
if (current_mii)
return current_mii->name;
@@ -156,8 +157,8 @@ char *miiphy_get_current_dev()
* Returns:
* 0 on success
*/
-int miiphy_read(char *devname, unsigned char addr, unsigned char reg,
- unsigned short *value)
+int miiphy_read (char *devname, unsigned char addr, unsigned char reg,
+ unsigned short *value)
{
struct list_head *entry;
struct mii_dev *dev;
@@ -165,22 +166,22 @@ int miiphy_read(char *devname, unsigned char addr, unsigned char reg,
int read_ret = 0;
if (!devname) {
- printf("NULL device name!\n");
+ printf ("NULL device name!\n");
return 1;
}
- list_for_each(entry, &mii_devs) {
- dev = list_entry(entry, struct mii_dev, link);
+ list_for_each (entry, &mii_devs) {
+ dev = list_entry (entry, struct mii_dev, link);
- if (strcmp(devname, dev->name) == 0) {
+ if (strcmp (devname, dev->name) == 0) {
found_dev = 1;
- read_ret = dev->read(devname, addr, reg, value);
+ read_ret = dev->read (devname, addr, reg, value);
break;
}
}
if (found_dev == 0)
- printf("No such device: %s\n", devname);
+ printf ("No such device: %s\n", devname);
return ((found_dev) ? read_ret : 1);
}
@@ -193,8 +194,8 @@ int miiphy_read(char *devname, unsigned char addr, unsigned char reg,
* Returns:
* 0 on success
*/
-int miiphy_write(char *devname, unsigned char addr, unsigned char reg,
- unsigned short value)
+int miiphy_write (char *devname, unsigned char addr, unsigned char reg,
+ unsigned short value)
{
struct list_head *entry;
struct mii_dev *dev;
@@ -202,22 +203,22 @@ int miiphy_write(char *devname, unsigned char addr, unsigned char reg,
int write_ret = 0;
if (!devname) {
- printf("NULL device name!\n");
+ printf ("NULL device name!\n");
return 1;
}
- list_for_each(entry, &mii_devs) {
- dev = list_entry(entry, struct mii_dev, link);
+ list_for_each (entry, &mii_devs) {
+ dev = list_entry (entry, struct mii_dev, link);
- if (strcmp(devname, dev->name) == 0) {
+ if (strcmp (devname, dev->name) == 0) {
found_dev = 1;
- write_ret = dev->write(devname, addr, reg, value);
+ write_ret = dev->write (devname, addr, reg, value);
break;
}
}
if (found_dev == 0)
- printf("No such device: %s\n", devname);
+ printf ("No such device: %s\n", devname);
return ((found_dev) ? write_ret : 1);
}
@@ -226,23 +227,22 @@ int miiphy_write(char *devname, unsigned char addr, unsigned char reg,
*
* Print out list of registered MII capable devices.
*/
-void miiphy_listdev(void)
+void miiphy_listdev (void)
{
struct list_head *entry;
struct mii_dev *dev;
- puts("MII devices: ");
- list_for_each(entry, &mii_devs) {
- dev = list_entry(entry, struct mii_dev, link);
- printf("'%s' ", dev->name);
+ puts ("MII devices: ");
+ list_for_each (entry, &mii_devs) {
+ dev = list_entry (entry, struct mii_dev, link);
+ printf ("'%s' ", dev->name);
}
- puts("\n");
+ puts ("\n");
if (current_mii)
- printf("Current device: '%s'\n", current_mii->name);
+ printf ("Current device: '%s'\n", current_mii->name);
}
-
/*****************************************************************************
*
* Read the OUI, manufacture's model number, and revision number.
@@ -254,9 +254,7 @@ void miiphy_listdev(void)
* Returns:
* 0 on success
*/
-int miiphy_info (char *devname,
- unsigned char addr,
- unsigned int *oui,
+int miiphy_info (char *devname, unsigned char addr, unsigned int *oui,
unsigned char *model, unsigned char *rev)
{
unsigned int reg = 0;
@@ -288,13 +286,12 @@ int miiphy_info (char *devname,
#ifdef DEBUG
printf ("PHY_PHYIDR[1,2] @ 0x%x = 0x%08x\n", addr, reg);
#endif
- *oui = ( reg >> 10);
- *model = (unsigned char) ((reg >> 4) & 0x0000003F);
- *rev = (unsigned char) ( reg & 0x0000000F);
+ *oui = (reg >> 10);
+ *model = (unsigned char)((reg >> 4) & 0x0000003F);
+ *rev = (unsigned char)(reg & 0x0000000F);
return (0);
}
-
/*****************************************************************************
*
* Reset the PHY.
@@ -345,7 +342,6 @@ int miiphy_reset (char *devname, unsigned char addr)
return (0);
}
-
/*****************************************************************************
*
* Determine the ethernet speed (10/100).
@@ -359,7 +355,8 @@ int miiphy_speed (char *devname, unsigned char addr)
printf ("PHY 1000BT Status read failed\n");
} else {
if (reg != 0xFFFF) {
- if ((reg & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)) !=0) {
+ if ((reg & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD))
+ != 0) {
return (_1000BASET);
}
}
@@ -393,7 +390,6 @@ int miiphy_speed (char *devname, unsigned char addr)
}
-
/*****************************************************************************
*
* Determine full/half duplex.
@@ -406,9 +402,9 @@ int miiphy_duplex (char *devname, unsigned char addr)
if (miiphy_read (devname, addr, PHY_1000BTSR, ®)) {
printf ("PHY 1000BT Status read failed\n");
} else {
- if ( (reg != 0xFFFF) &&
- (reg & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)) ) {
- if ((reg & PHY_1000BTSR_1000FD) !=0) {
+ if ((reg != 0xFFFF) &&
+ (reg & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD))) {
+ if ((reg & PHY_1000BTSR_1000FD) != 0) {
return (FULL);
} else {
return (HALF);
@@ -455,7 +451,7 @@ int miiphy_link (char *devname, unsigned char addr)
unsigned short reg;
/* dummy read; needed to latch some phys */
- (void)miiphy_read(devname, addr, PHY_BMSR, ®);
+ (void)miiphy_read (devname, addr, PHY_BMSR, ®);
if (miiphy_read (devname, addr, PHY_BMSR, ®)) {
puts ("PHY_BMSR read failed, assuming no link\n");
return (0);
@@ -469,5 +465,4 @@ int miiphy_link (char *devname, unsigned char addr)
}
}
#endif
-
#endif /* CONFIG_MII */
diff --git a/cpu/ppc4xx/miiphy.c b/cpu/ppc4xx/miiphy.c
index 6b98025..2fa1b57 100644
--- a/cpu/ppc4xx/miiphy.c
+++ b/cpu/ppc4xx/miiphy.c
@@ -27,19 +27,6 @@
|
| Author: Mark Wisner
|
- | Change Activity-
- |
- | Date Description of Change BY
- | --------- --------------------- ---
- | 05-May-99 Created MKW
- | 01-Jul-99 Changed clock setting of sta_reg from 66Mhz to 50Mhz to
- | better match OPB speed. Also modified delay times. JWB
- | 29-Jul-99 Added Full duplex support MKW
- | 24-Aug-99 Removed printf from dp83843_duplex() JWB
- | 19-Jul-00 Ported to esd cpci405 sr
- | 23-Dec-03 Ported from miiphy.c to 440GX Travis Sawyer TBS
- | <travis.sawyer at sandburst.com>
- |
+-----------------------------------------------------------------------------*/
#include <common.h>
@@ -60,7 +47,6 @@ void miiphy_dump (char *devname, unsigned char addr)
unsigned long i;
unsigned short data;
-
for (i = 0; i < 0x1A; i++) {
if (miiphy_read (devname, addr, i, &data)) {
printf ("read error for reg %lx\n", i);
@@ -75,7 +61,6 @@ void miiphy_dump (char *devname, unsigned char addr)
} /* end for loop */
} /* end dump */
-
/***********************************************************/
/* (Re)start autonegotiation */
/***********************************************************/
@@ -102,7 +87,6 @@ int phy_setup_aneg (char *devname, unsigned char addr)
return 0;
}
-
/***********************************************************/
/* read a phy reg and return the value with a rc */
/***********************************************************/
@@ -145,21 +129,20 @@ unsigned int miiphy_getemac_offset (void)
#endif
}
-
-int emac4xx_miiphy_read (char *devname, unsigned char addr,
- unsigned char reg, unsigned short *value)
+int emac4xx_miiphy_read (char *devname, unsigned char addr, unsigned char reg,
+ unsigned short *value)
{
unsigned long sta_reg; /* STA scratch area */
unsigned long i;
unsigned long emac_reg;
-
emac_reg = miiphy_getemac_offset ();
/* see if it is ready for 1000 nsec */
i = 0;
/* see if it is ready for sec */
- while ((in32 (EMAC_STACR + emac_reg) & EMAC_STACR_OC) == EMAC_STACR_OC_MASK) {
+ while ((in32 (EMAC_STACR + emac_reg) & EMAC_STACR_OC) ==
+ EMAC_STACR_OC_MASK) {
udelay (7);
if (i > 5) {
#ifdef ET_DEBUG
@@ -175,10 +158,10 @@ int emac4xx_miiphy_read (char *devname, unsigned char addr,
/* set clock (50Mhz) and read flags */
#if defined(CONFIG_440GX) || defined(CONFIG_440SPE) || \
defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
-#if defined(CONFIG_IBM_EMAC4_V4) /* EMAC4 V4 changed bit setting */
- sta_reg = (sta_reg & ~EMAC_STACR_OP_MASK) | EMAC_STACR_READ;
+#if defined(CONFIG_IBM_EMAC4_V4) /* EMAC4 V4 changed bit setting */
+ sta_reg = (sta_reg & ~EMAC_STACR_OP_MASK) | EMAC_STACR_READ;
#else
- sta_reg |= EMAC_STACR_READ;
+ sta_reg |= EMAC_STACR_READ;
#endif
#else
sta_reg = (sta_reg | EMAC_STACR_READ) & ~EMAC_STACR_CLK_100MHZ;
@@ -198,7 +181,7 @@ int emac4xx_miiphy_read (char *devname, unsigned char addr,
sta_reg = in32 (EMAC_STACR + emac_reg);
#ifdef ET_DEBUG
- printf ("a21: read : EMAC_STACR=0x%0x\n", sta_reg); /* test-only */
+ printf ("a21: read : EMAC_STACR=0x%0x\n", sta_reg); /* test-only */
#endif
i = 0;
while ((sta_reg & EMAC_STACR_OC) == EMAC_STACR_OC_MASK) {
@@ -216,19 +199,17 @@ int emac4xx_miiphy_read (char *devname, unsigned char addr,
return -1;
}
- *value = *(short *) (&sta_reg);
+ *value = *(short *)(&sta_reg);
return 0;
-
} /* phy_read */
-
/***********************************************************/
/* write a phy reg and return the value with a rc */
/***********************************************************/
-int emac4xx_miiphy_write (char *devname, unsigned char addr,
- unsigned char reg, unsigned short value)
+int emac4xx_miiphy_write (char *devname, unsigned char addr, unsigned char reg,
+ unsigned short value)
{
unsigned long sta_reg; /* STA scratch area */
unsigned long i;
@@ -238,7 +219,8 @@ int emac4xx_miiphy_write (char *devname, unsigned char addr,
/* see if it is ready for 1000 nsec */
i = 0;
- while ((in32 (EMAC_STACR + emac_reg) & EMAC_STACR_OC) == EMAC_STACR_OC_MASK) {
+ while ((in32 (EMAC_STACR + emac_reg) & EMAC_STACR_OC) ==
+ EMAC_STACR_OC_MASK) {
if (i > 5)
return -1;
udelay (7);
@@ -249,10 +231,10 @@ int emac4xx_miiphy_write (char *devname, unsigned char addr,
/* set clock (50Mhz) and read flags */
#if defined(CONFIG_440GX) || defined(CONFIG_440SPE) || \
defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
-#if defined(CONFIG_IBM_EMAC4_V4) /* EMAC4 V4 changed bit setting */
- sta_reg = (sta_reg & ~EMAC_STACR_OP_MASK) | EMAC_STACR_WRITE;
+#if defined(CONFIG_IBM_EMAC4_V4) /* EMAC4 V4 changed bit setting */
+ sta_reg = (sta_reg & ~EMAC_STACR_OP_MASK) | EMAC_STACR_WRITE;
#else
- sta_reg |= EMAC_STACR_WRITE;
+ sta_reg |= EMAC_STACR_WRITE;
#endif
#else
sta_reg = (sta_reg | EMAC_STACR_WRITE) & ~EMAC_STACR_CLK_100MHZ;
@@ -263,8 +245,8 @@ int emac4xx_miiphy_write (char *devname, unsigned char addr,
!defined(CONFIG_440EPX) && !defined(CONFIG_440GRX)
sta_reg = sta_reg | CONFIG_PHY_CLK_FREQ; /* Set clock frequency (PLB freq. dependend) */
#endif
- sta_reg = sta_reg | ((unsigned long) addr << 5);/* Phy address */
- sta_reg = sta_reg | EMAC_STACR_OC_MASK; /* new IBM emac v4 */
+ sta_reg = sta_reg | ((unsigned long)addr << 5); /* Phy address */
+ sta_reg = sta_reg | EMAC_STACR_OC_MASK; /* new IBM emac v4 */
memcpy (&sta_reg, &value, 2); /* put in data */
out32 (EMAC_STACR + emac_reg, sta_reg);
@@ -273,7 +255,7 @@ int emac4xx_miiphy_write (char *devname, unsigned char addr,
i = 0;
sta_reg = in32 (EMAC_STACR + emac_reg);
#ifdef ET_DEBUG
- printf ("a31: read : EMAC_STACR=0x%0x\n", sta_reg); /* test-only */
+ printf ("a31: read : EMAC_STACR=0x%0x\n", sta_reg); /* test-only */
#endif
while ((sta_reg & EMAC_STACR_OC) == EMAC_STACR_OC_MASK) {
udelay (7);
@@ -290,4 +272,4 @@ int emac4xx_miiphy_write (char *devname, unsigned char addr,
return -1;
return 0;
-} /* phy_write */
+} /* phy_write */
diff --git a/include/miiphy.h b/include/miiphy.h
index 71716b0..42f2ad0 100644
--- a/include/miiphy.h
+++ b/include/miiphy.h
@@ -26,56 +26,48 @@
|
| Author: Mark Wisner
|
-| Change Activity-
-|
-| Date Description of Change BY
-| --------- --------------------- ---
-| 04-May-99 Created MKW
-| 07-Jul-99 Added full duplex support MKW
-| 08-Sep-01 Tweaks gvb
-|
+----------------------------------------------------------------------------*/
#ifndef _miiphy_h_
#define _miiphy_h_
#include <net.h>
-int miiphy_read(char *devname, unsigned char addr, unsigned char reg,
- unsigned short *value);
-int miiphy_write(char *devname, unsigned char addr, unsigned char reg,
- unsigned short value);
-int miiphy_info(char *devname, unsigned char addr, unsigned int *oui,
- unsigned char *model, unsigned char *rev);
-int miiphy_reset(char *devname, unsigned char addr);
-int miiphy_speed(char *devname, unsigned char addr);
-int miiphy_duplex(char *devname, unsigned char addr);
+int miiphy_read (char *devname, unsigned char addr, unsigned char reg,
+ unsigned short *value);
+int miiphy_write (char *devname, unsigned char addr, unsigned char reg,
+ unsigned short value);
+int miiphy_info (char *devname, unsigned char addr, unsigned int *oui,
+ unsigned char *model, unsigned char *rev);
+int miiphy_reset (char *devname, unsigned char addr);
+int miiphy_speed (char *devname, unsigned char addr);
+int miiphy_duplex (char *devname, unsigned char addr);
#ifdef CFG_FAULT_ECHO_LINK_DOWN
-int miiphy_link(char *devname, unsigned char addr);
+int miiphy_link (char *devname, unsigned char addr);
#endif
-void miiphy_init(void);
+void miiphy_init (void);
-void miiphy_register(char *devname,
- int (* read)(char *devname, unsigned char addr,
- unsigned char reg, unsigned short *value),
- int (* write)(char *devname, unsigned char addr,
- unsigned char reg, unsigned short value));
+void miiphy_register (char *devname,
+ int (*read) (char *devname, unsigned char addr,
+ unsigned char reg, unsigned short *value),
+ int (*write) (char *devname, unsigned char addr,
+ unsigned char reg, unsigned short value));
-int miiphy_set_current_dev(char *devname);
-char *miiphy_get_current_dev(void);
+int miiphy_set_current_dev (char *devname);
+char *miiphy_get_current_dev (void);
-void miiphy_listdev(void);
+void miiphy_listdev (void);
#define BB_MII_DEVNAME "bbmii"
int bb_miiphy_read (char *devname, unsigned char addr,
- unsigned char reg, unsigned short *value);
+ unsigned char reg, unsigned short *value);
int bb_miiphy_write (char *devname, unsigned char addr,
- unsigned char reg, unsigned short value);
+ unsigned char reg, unsigned short value);
/* phy seed setup */
#define AUTO 99
-#define _1000BASET 1000
+#define _1000BASET 1000
#define _100BASET 100
#define _10BASET 10
#define HALF 22
@@ -90,9 +82,9 @@ int bb_miiphy_write (char *devname, unsigned char addr,
#define PHY_ANLPAR 0x05
#define PHY_ANER 0x06
#define PHY_ANNPTR 0x07
-#define PHY_ANLPNP 0x08
-#define PHY_1000BTCR 0x09
-#define PHY_1000BTSR 0x0A
+#define PHY_ANLPNP 0x08
+#define PHY_1000BTCR 0x09
+#define PHY_1000BTSR 0x0A
#define PHY_PHYSTS 0x10
#define PHY_MIPSCR 0x11
#define PHY_MIPGSR 0x12
@@ -115,10 +107,10 @@ int bb_miiphy_write (char *devname, unsigned char addr,
#define PHY_BMCR_DPLX 0x0100
#define PHY_BMCR_COL_TST 0x0080
-#define PHY_BMCR_SPEED_MASK 0x2040
-#define PHY_BMCR_1000_MBPS 0x0040
-#define PHY_BMCR_100_MBPS 0x2000
-#define PHY_BMCR_10_MBPS 0x0000
+#define PHY_BMCR_SPEED_MASK 0x2040
+#define PHY_BMCR_1000_MBPS 0x0040
+#define PHY_BMCR_100_MBPS 0x2000
+#define PHY_BMCR_10_MBPS 0x0000
/* phy BMSR */
#define PHY_BMSR_100T4 0x8000
@@ -143,18 +135,18 @@ int bb_miiphy_write (char *devname, unsigned char addr,
#define PHY_ANLPAR_TX 0x0080
#define PHY_ANLPAR_10FD 0x0040
#define PHY_ANLPAR_10 0x0020
-#define PHY_ANLPAR_100 0x0380 /* we can run at 100 */
-
-#define PHY_ANLPAR_PSB_MASK 0x001f
-#define PHY_ANLPAR_PSB_802_3 0x0001
-#define PHY_ANLPAR_PSB_802_9 0x0002
-
-/* PHY_1000BTSR */
-#define PHY_1000BTSR_MSCF 0x8000
-#define PHY_1000BTSR_MSCR 0x4000
-#define PHY_1000BTSR_LRS 0x2000
-#define PHY_1000BTSR_RRS 0x1000
-#define PHY_1000BTSR_1000FD 0x0800
-#define PHY_1000BTSR_1000HD 0x0400
+#define PHY_ANLPAR_100 0x0380 /* we can run at 100 */
+
+#define PHY_ANLPAR_PSB_MASK 0x001f
+#define PHY_ANLPAR_PSB_802_3 0x0001
+#define PHY_ANLPAR_PSB_802_9 0x0002
+
+/* phy 1000BTSR */
+#define PHY_1000BTSR_MSCF 0x8000
+#define PHY_1000BTSR_MSCR 0x4000
+#define PHY_1000BTSR_LRS 0x2000
+#define PHY_1000BTSR_RRS 0x1000
+#define PHY_1000BTSR_1000FD 0x0800
+#define PHY_1000BTSR_1000HD 0x0400
#endif
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