[U-Boot-Users] Need help understanding cpu/mpc85xx/start.S

[robert lazarski]

On 9/26/07, Andy Fleming <afleming at gmail.com> wrote:
> On 9/26/07, robert lazarski <robertlazarski at gmail.com> wrote:
> > Hi all,
> >
> >
> > Starting with the basics: R1 has a 4K stack from 0xfffff000-0xffffffff
> > and the stack grows down?
>
> It better not.  r1 will eventually have a stack somewhere.  Initially,
> we put it in unmapped memory space which allows us to use the cache as
> memory.  0xfffff000-0xffffffff is the last page in memory, and that is
> a) in Flash, and b) the boot page.  Until you execute the code you're
> having a problem with below, that last page will be the only page
> mapped.
>

Can I get clarification on one point in particular here please? Before
the TLB's get processed, IVPR is set to the TEXT_BASE - 0xfff80000 -
and then IVOR15 is set to 0x0f00, ie 'Debug' interrupt type is mapped
to 0xfff80f00 . If that is correct, isn't 0xfff80f00 unmapped, since
only the last page 0xfffff000-0xffffffff is mapped?

I ask because for bdi, debugging works only if the Debug Interrupt
(IVOR15) points to a valid, mapped and therefore executable opcode. If
not then the core crashes. I ask because I may have a TLB issue and
I'm having a hard finding it. Or maybe the bdi core is crashing simply
because IVOR15 is not an executable opcode ?

Thanks all, I hope I'm asking valid questions that are of general interest,
Robert