[U-Boot-Users] [MIPS] cpu/mips/cpu.c: Fix flush_cache bug

[Wolfgang Denk]

In message <47FB1CC3.2090904 at necel.com> you wrote:
> Cache operations have to take line address (addr), not start_addr.
> I noticed this bug when debugging ping failure.
> 
> Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi at necel.com>
> ---
> 
>  cpu/mips/cpu.c |    4 ++--
>  1 files changed, 2 insertions(+), 2 deletions(-)

Applied, thanks.

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
It is impractical for  the  standard  to  attempt  to  constrain  the
behavior  of code that does not obey the constraints of the standard.
                                                          - Doug Gwyn