[U-Boot-Users] [PATCH] MPC8544DS: decode pcie3 end-point configuration correctly.

[Kumar Gala]

From: Ed Swarthout <Ed.Swarthout at freescale.com>

Signed-off-by: Ed Swarthout <Ed.Swarthout at freescale.com>
Signed-off-by: Kumar Gala <galak at kernel.crashing.org>
---
 board/freescale/mpc8544ds/mpc8544ds.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/board/freescale/mpc8544ds/mpc8544ds.c b/board/freescale/mpc8544ds/mpc8544ds.c
index 8107016..dd10af8 100644
--- a/board/freescale/mpc8544ds/mpc8544ds.c
+++ b/board/freescale/mpc8544ds/mpc8544ds.c
@@ -163,7 +163,7 @@ pci_init_board(void)
 	volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CFG_PCIE3_ADDR;
 	extern void fsl_pci_init(struct pci_controller *hose);
 	struct pci_controller *hose = &pcie3_hose;
-	int pcie_ep = (host_agent == 3);
+	int pcie_ep = (host_agent == 1);
 	int pcie_configured  = io_sel >= 1;

 	if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
-- 
1.5.4.1