[U-Boot] [PATCH 4/8] ColdFire: Change the SDRAM BRD2WT timing from 3 to 7

[Tsi-Chung Liew]

From: TsiChung Liew <Tsi-Chung.Liew at freescale.com>

The user manuals recommend 7.

Signed-off-by: Kurt Mahan <kmahan at freescale.com>
Acked-by: TsiChung Liew <Tsi-Chung.Liew at freescale.com>
---
 include/configs/M5475EVB.h |    2 +-
 include/configs/M5485EVB.h |    2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/configs/M5475EVB.h b/include/configs/M5475EVB.h
index 4037efb..af6723c 100644
--- a/include/configs/M5475EVB.h
+++ b/include/configs/M5475EVB.h
@@ -226,7 +226,7 @@
  */
 #define CFG_SDRAM_BASE		0x00000000
 #define CFG_SDRAM_CFG1		0x73711630
-#define CFG_SDRAM_CFG2		0x46370000
+#define CFG_SDRAM_CFG2		0x46770000
 #define CFG_SDRAM_CTRL		0xE10B0000
 #define CFG_SDRAM_EMOD		0x40010000
 #define CFG_SDRAM_MODE		0x018D0000
diff --git a/include/configs/M5485EVB.h b/include/configs/M5485EVB.h
index a14c55b..248db53 100644
--- a/include/configs/M5485EVB.h
+++ b/include/configs/M5485EVB.h
@@ -212,7 +212,7 @@
  */
 #define CFG_SDRAM_BASE		0x00000000
 #define CFG_SDRAM_CFG1		0x73711630
-#define CFG_SDRAM_CFG2		0x46370000
+#define CFG_SDRAM_CFG2		0x46770000
 #define CFG_SDRAM_CTRL		0xE10B0000
 #define CFG_SDRAM_EMOD		0x40010000
 #define CFG_SDRAM_MODE		0x018D0000
-- 
1.5.6.4