[U-Boot-Users] [PATCH] cpu/mpc85xx/start.S: correct temporary TLB
Kumar Gala
galak at kernel.crashing.org
Wed Jul 2 16:40:12 CEST 2008
On Jul 2, 2008, at 9:11 AM, Andrew Klossner wrote:
>> From 03e28f90637703aaef9356dc398adedcdf06cb94 Mon Sep 17 00:00:00
>> 2001
> From: Andrew Klossner <andrew at cesa.opbu.xerox.com>
> Date: Wed, 2 Jul 2008 07:03:53 -0700
> Subject: [PATCH] Change the temp map to ROM to align addresses to
> page size.
>
> With a page size of BOOKE_PAGESZ_16M, both the real and effective
> addresses must be multiples of 16MB. The hardware silently truncates
> them so the code happens to work. This patch clarifies the situation
> by establishing addresses that the hardware doesn't need to truncate.
> ---
> cpu/mpc85xx/start.S | 8 ++++----
> 1 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/cpu/mpc85xx/start.S b/cpu/mpc85xx/start.S
> index 2b5d90e..e2554d7 100644
> --- a/cpu/mpc85xx/start.S
> +++ b/cpu/mpc85xx/start.S
> @@ -188,11 +188,11 @@ _start_e500:
> lis r7,FSL_BOOKE_MAS1(1, 1, 0, 1, BOOKE_PAGESZ_16M)@h
> ori r7,r7,FSL_BOOKE_MAS1(1, 1, 0, 1, BOOKE_PAGESZ_16M)@l
>
> - lis r8,FSL_BOOKE_MAS2(TEXT_BASE, (MAS2_I|MAS2_G))@h
> - ori r8,r8,FSL_BOOKE_MAS2(TEXT_BASE, (MAS2_I|MAS2_G))@l
> + lis r8,FSL_BOOKE_MAS2(0xff000000, (MAS2_I|MAS2_G))@h
> + ori r8,r8,FSL_BOOKE_MAS2(0xff000000, (MAS2_I|MAS2_G))@l
This needs to be TEXT_BASE & 0xFF000000
> - lis r9,FSL_BOOKE_MAS3(0xff800000, 0, (MAS3_SX|MAS3_SW|
> MAS3_SR))@h
> - ori r9,r9,FSL_BOOKE_MAS3(0xff800000, 0, (MAS3_SX|MAS3_SW|
> MAS3_SR))@l
> + lis r9,FSL_BOOKE_MAS3(0xff000000, 0, (MAS3_SX|MAS3_SW|
> MAS3_SR))@h
> + ori r9,r9,FSL_BOOKE_MAS3(0xff000000, 0, (MAS3_SX|MAS3_SW|
> MAS3_SR))@l
>
> mtspr MAS0,r6
> mtspr MAS1,r7
- k
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