[U-Boot-Users] [PATCH v2] PPC4xx: Add Mnemonics for AMCC/IBM DDR2 SDRAM Controller

[Stefan Roese]

On Thursday 10 July 2008, Grant Erickson wrote:
> This patch completes the preprocessor mneomics for the IBM DDR2 SDRAM
> controller registers (MODT and INITPLR) used by the
> PowerPC405EX(r). The MMODE and MEMODE registers are unified with their
> peer values used for the INITPLR MR and EMR registers,
> respectively. Finally, a spelling typo is correct (MANUEL to MANUAL).
>
> With these mnemonics in place, the CFG_SDRAM0_* magic numbers for
> Kilauea are replaced by equivalent mnemonics to make it easier to
> compare and contrast other 405EX(r)-based boards (e.g. during board
> bring-up).
>
> Finally, unified the SDRAM controller register dump routine such that
> it can be used across all processor variants that utilize the IBM DDR2
> SDRAM controller core. It produces output of the form:
>
> 	PPC4xx IBM DDR2 Register Dump:
> 		...
> 	        SDRAM_MB0CF[40] = 0x00006701
> 		...
>
> which is '<mnemonic>[<DCR #>] = <value>'. The DCR number is included
> since it is not uncommon that the DCR values in header files get mixed
> up and it helps to validate, at a glance, they match what is printed
> in the user manual.
>
> Tested on:
>   AMCC Kilauea/Haleakala:
>   - NFS Linux Boot: PASSED
>   - NAND Linux Boot: PASSED
>
> Signed-off-by: Grant Erickson <gerickson at nuovations.com>

Applied to "next" branch in u-boot-ppc4xx repository. Thanks.

Best regards,
Stefan

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