[U-Boot-Users] RFQ: disable flash writes until after relocation?
David Hawkins
dwh at ovro.caltech.edu
Sat Jul 19 19:49:29 CEST 2008
Hi all,
We recently debugged a problem where a Flash write on
MPC8349E and MPC8349EA processor boards was accidentally
occurring during board initialization.
Under the right conditions, the write appears to put
the flash into a command-mode, rather than read-data mode,
and further reads from the flash return invalid data
(as far as the processor is concerned). The write was
coming from drivers code that we had not introduced,
and depends on the address of the flash write which
changes depending on the section sizes, so the cause
of the bug was not initially obvious.
The MPC8349 processor base register has the option;
BRn[WP] = 1, that could be used to disable writes to the
boot flash. This local bus controller register is likely
the same on all 83xx series processors. To see if this
type of feature was on any other PowerPC processors,
I looked in the AMCC 440EP manual. The 440EP local
bus peripheral bank configuration registers has
a bank-usage bit that can be used to set the
440EP local bus read-only, EBC0_B0CR[BU] = 01b.
Writes to boot Flash could be disabled early on in the
boot sequence, and then enabled again after relocation.
This would protect against writes to the boot flash.
The downside of this change, would be that flash writes
would not work if you stopped the processor between the
time writes were disabled, and then enabled. So if you
were debugging, stepped into code before relocation,
and decided to stop the processor and erase the flash
(using your favorite debugger), flash erase would fail.
Hence, the consensus may be that we don't want this type
of feature - it may generate too many messages;
'help I can't program Flash'
However, the debugger initialization file could be written to
enable the flash before attempting to erase or program it.
The fix will also not expose the accidental introduction
of flash writes in the future, it'll just stop those
writes from having any effect.
It would be nicer to generate an exception if a write to
flash occurs during the period before relocation, at least
that way the introduction of an accidental flash write
would be detected immediately. I could have a look at
the 83xx MMU settings during that time and see if there
was an alternative solution using that.
The 440EP manual indicates that a protect error would
occur if a write is attempted to a read-only bank.
I figured I'd gauge if there was any interest in adding
this feature before looking into it further.
Cheers,
Dave
More information about the U-Boot
mailing list