[U-Boot-Users] [PATCH] Correct ARM Versatile Timer Initialization

[Gururaja Hebbar K R]

Hi,
 
Sorry. Re-sending as uboot-mailing list was not properly Included last
time
 
Regards
Gururaja
 
- According to ARM Dual-Timer Module (SP804) TRM (ARM DDI0271), 
--Timer Value Register @ TIMER Base + 4 is Read-only. So removed code
which writes to this register
--Prescale Value (Bits 3-2 of TIMER Control register) can only be one of
00,01,10. 11 is undefined.
  So bringing Correcting the same to point to 00.
 
Signed-off-by: Gururaja Hebbar <gururajakr at sanyo.co.in
<blocked::mailto:gururajakr at sanyo.co.in> >
---
 cpu/arm926ejs/versatile/timer.c |    3 +--
 1 files changed, 1 insertions(+), 2 deletions(-)
 
diff --git a/cpu/arm926ejs/versatile/timer.c
b/cpu/arm926ejs/versatile/timer.c
index 32872d2..9659b67 100644
--- a/cpu/arm926ejs/versatile/timer.c
+++ b/cpu/arm926ejs/versatile/timer.c
@@ -50,8 +50,7 @@ static ulong lastdec;
 int timer_init (void)
 {
  *(volatile ulong *)(CFG_TIMERBASE + 0) = CFG_TIMER_RELOAD; /*
TimerLoad */
- *(volatile ulong *)(CFG_TIMERBASE + 4) = CFG_TIMER_RELOAD; /*
TimerValue */
- *(volatile ulong *)(CFG_TIMERBASE + 8) = 0x8C;
+ *(volatile ulong *)(CFG_TIMERBASE + 8) = 0x80;
 
  /* init the timestamp and lastdec value */
  reset_timer_masked();
-- 
1.5.6
 
 
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