[U-Boot-Users] [PATCH] Add MIMC200 board - now uses board_eth_init()

[Ben Warren]

Hi Mark,

On Mon, Jul 28, 2008 at 12:32 PM, Mark Jackson <mpfj at mimc.co.uk> wrote:
> The MIMC200 board is based on Atmel's NGW100 dev kit,
> but with an extra 8MByte FLASH and 128KByte FRAM.
>

No need to put the stuff about board_eth_init() in the subject.  Just
label this as [PATCH V2].

<snip>

> +    // enable higher address lines for larger flash devices
C++ style comments are not allowed.  Please fix them all.

<snip>

> +#ifdef CONFIG_CMD_NET
> +extern int macb_eth_initialize(int id, void *regs, unsigned int phy_addr);
> +
> +void board_eth_init(bd_t *bi)
> +{
> +    macb_eth_initialize(0, (void *)MACB0_BASE, bi->bi_phy_id[0]);
> +    macb_eth_initialize(1, (void *)MACB1_BASE, bi->bi_phy_id[1]);
> +}

The prototype is:

int board_eth_init(bd_t *);

You'll need to return 0 if you can't get anything useful from
macb_eth_initialize();

<snip>

> diff --git a/cpu/at32ap/at32ap700x/clk.c b/cpu/at32ap/at32ap700x/clk.c
> index b3aa034..73b859e 100644
> --- a/cpu/at32ap/at32ap700x/clk.c
> +++ b/cpu/at32ap/at32ap700x/clk.c
> @@ -65,4 +65,12 @@ void clk_init(void)
>    /* Use PLL0 as main clock */
>    sm_writel(PM_MCCTRL, SM_BIT(PLLSEL));
> #endif
> +
> +#ifdef CONFIG_MIMC200
> +    // enable gclk outputs
> +    //AVR32_PM.gcctrl[0] = 0x0004; /* LVDS at 10MHz */
> +    sm_writel(PM_GCCTRL, 0x00000004);
> +    //AVR32_PM.gcctrl[1] = 0x0216; /* Ethernet at 25MHz if PLL running */
> +    //sm_writel(PM_GCCTRL + 4, 0x00000216);
> +#endif
> }

It's frowned upon to conditionally compile board-specific code in CPU
files.  Can this be done in your board code?

> diff --git a/cpu/at32ap/at32ap700x/gpio.c b/cpu/at32ap/at32ap700x/gpio.c
> index 56ba2f9..7c6679d 100644
> --- a/cpu/at32ap/at32ap700x/gpio.c
> +++ b/cpu/at32ap/at32ap700x/gpio.c
> @@ -104,8 +104,10 @@ void gpio_enable_macb0(void)
>    gpio_select_periph_A(GPIO_PIN_PC11, 0);    /* RXD2    */
>    gpio_select_periph_A(GPIO_PIN_PC12, 0);    /* RXD3    */
>    gpio_select_periph_A(GPIO_PIN_PC14, 0);    /* RXCK    */
> +#ifndef CONFIG_MIMC200
>    gpio_select_periph_A(GPIO_PIN_PC18, 0);    /* SPD    */
> #endif
> +#endif
> }
>
> void gpio_enable_macb1(void)
> @@ -129,8 +131,10 @@ void gpio_enable_macb1(void)
>    gpio_select_periph_B(GPIO_PIN_PC29, 0);    /* RXD2    */
>    gpio_select_periph_B(GPIO_PIN_PC30, 0);    /* RXD3    */
>    gpio_select_periph_B(GPIO_PIN_PC24, 0);    /* RXCK    */
> +#ifndef CONFIG_MIMC200
>    gpio_select_periph_B(GPIO_PIN_PD15, 0);    /* SPD    */
> #endif
> +#endif
> }
> #endif
>
> diff --git a/cpu/at32ap/cpu.c b/cpu/at32ap/cpu.c
> index 0ba8361..8985b68 100644
> --- a/cpu/at32ap/cpu.c
> +++ b/cpu/at32ap/cpu.c
> @@ -56,6 +56,20 @@ int cpu_init(void)
>    hsmc3_writel(PULSE0, 0x0b0a0906);
>    hsmc3_writel(SETUP0, 0x00010002);
>
> +#ifdef CONFIG_MIMC200
> +    // setup Data Flash chip select (NCS2)
> +    hsmc3_writel(MODE2, 0x20121003);
> +    hsmc3_writel(CYCLE2, 0x000a0009);
> +    hsmc3_writel(PULSE2, 0x0a060806);
> +    hsmc3_writel(SETUP2, 0x00030102);
> +
> +    // setup FRAM chip select (NCS3)
> +    hsmc3_writel(MODE3, 0x10120001);
> +    hsmc3_writel(CYCLE3, 0x001e001d);
> +    hsmc3_writel(PULSE3, 0x08040704);
> +    hsmc3_writel(SETUP3, 0x02050204);
> +#endif
> +
>    clk_init();
>
>    /* Update the CPU speed according to the PLL configuration */
> diff --git a/drivers/serial/atmel_usart.c b/drivers/serial/atmel_usart.c
> index f35b997..9e131c0 100644
> --- a/drivers/serial/atmel_usart.c
> +++ b/drivers/serial/atmel_usart.c
> @@ -21,6 +21,9 @@
> #include <asm/io.h>
> #include <asm/arch/clk.h>
> #include <asm/arch/memory-map.h>
> +#if defined(CONFIG_MIMC200_DBGLINK)
> +#include <asm/arch/gpio.h>
> +#endif
>
This is definitely uncool.  Don't pollute common code with your debug stuff.

Looking forward to V3

regards,
Ben