[U-Boot-Users] [RFC][FSL DDR 4/8] FSL DDR: Provide a generic fsl_ddr_sdram_set_lawbar()

[Kumar Gala]

Make fsl_ddr_sdram_set_lawbar() a weak function to allow board code to
override if desired.

Signed-off-by: Kumar Gala <galak at kernel.crashing.org>
---
 drivers/misc/fsl_law.c |   63 ++++++++++++++++++++++++++++++++++++++++++++++++
 1 files changed, 63 insertions(+), 0 deletions(-)

diff --git a/drivers/misc/fsl_law.c b/drivers/misc/fsl_law.c
index dca6a4d..f9bdf10 100644
--- a/drivers/misc/fsl_law.c
+++ b/drivers/misc/fsl_law.c
@@ -72,6 +72,69 @@ void print_laws(void)
 	return;
 }
 
+#if defined(CONFIG_FSL_DDR1) || \
+    defined(CONFIG_FSL_DDR2) || \
+    defined(CONFIG_FSL_DDR3)
+#include <../cpu/mpc8xxx/fsl_ddr_sdram.h>
+
+void
+__fsl_ddr_sdram_set_lawbar(const common_timing_params_t *memctl_common_params,
+			   unsigned int memctl_interleaved,
+			   unsigned int ctrl_num)
+{
+	unsigned long law_base_address;
+	unsigned long memsize_MB;
+	unsigned int law_size;
+
+	/*
+	 * If no DIMMs on this controller, do not proceed any further.
+	 */
+	if (!memctl_common_params->ndimms_present) {
+		return;
+	}
+
+	law_base_address = memctl_common_params->base_address;
+
+	/*
+	 * Compute LAWBARn[SIZE] value for 2**(SIZE + 1) bytes.
+	 * If interleaving is used, the memory size must represent
+	 * the combined total of both controllers.
+	 * The first supported LAW size is 16M, at LAWAR_SIZE_16M == 23.
+	 * Fnord.
+	 */
+	memsize_MB = memctl_common_params->total_mem / 0x100000;
+	law_size = 19 + __ilog2(memsize_MB << memctl_interleaved);
+
+	if (ctrl_num == 0) {
+		/*
+		 * Set up LAWBAR1 for DDR controller 1 space.
+		 */
+		unsigned int lawbar1_target_id = memctl_interleaved
+			? LAW_TRGT_IF_DDR_INTRLV : LAW_TRGT_IF_DDR_1;
+
+		set_law(1, law_base_address, law_size, lawbar1_target_id);
+		debug("ctl0 law_base_address = 0x%08X, law_size = 0x%x\n",
+		      law_base_address, law_size);
+
+	} else if (ctrl_num == 1) {
+		/*
+		 * Set up LAWBAR2 for DDR controller 2 space.
+		 */
+		set_law(2, law_base_address, law_size, LAW_TRGT_IF_DDR_2);
+		debug("ctl1 law_base_address = 0x%08X, law_size = 0x%x\n",
+		      law_base_address, law_size);
+
+	} else {
+		printf("unexpected controller number %u in fsl_ddr_sdram_set_lawbar()\n", ctrl_num);
+	}
+}
+
+__attribute__((weak, alias("__fsl_ddr_sdram_set_lawbar"))) void
+fsl_ddr_sdram_set_lawbar(const common_timing_params_t *memctl_common_params,
+			 unsigned int memctl_interleaved,
+			 unsigned int ctrl_num);
+#endif
+
 void init_laws(void)
 {
 	int i;
-- 
1.5.5.1