[U-Boot-Users] [PATCH 4/4][RFC] ReAdd extracted Juniper Networks PCI hcd driver

Tor Krill tor at excito.com
Mon Jun 23 13:24:37 CEST 2008


Readds Juniper Networks original Philips PCI driver. (Untested)

Signed-off-by: Tor Krill <tor at excito.com>
---
 drivers/usb/usb_ehci_pci.c |  135 ++++++++++++++++++++++++++++++++++++++++++++
 drivers/usb/usb_ehci_pci.h |   37 ++++++++++++
 2 files changed, 172 insertions(+), 0 deletions(-)
 create mode 100644 drivers/usb/usb_ehci_pci.c
 create mode 100644 drivers/usb/usb_ehci_pci.h

diff --git a/drivers/usb/usb_ehci_pci.c b/drivers/usb/usb_ehci_pci.c
new file mode 100644
index 0000000..d652122
--- /dev/null
+++ b/drivers/usb/usb_ehci_pci.c
@@ -0,0 +1,135 @@
+/*-
+ * Copyright (c) 2007-2008, Juniper Networks, Inc.
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2 of
+ * the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <pci.h>
+#include <usb.h>
+#include "usb_ehci.h"
+#include "usb_ehci_pci.h"
+#include "usb_ehci_core.h"
+
+#ifdef EHCI_DEBUG
+static void dump_pci_reg (pci_dev_t dev, int ofs)
+{
+	uint32_t reg;
+
+	pci_read_config_dword (dev, ofs, &reg);
+	printf ("\t0x%02x: %08x\n", ofs, reg);
+}
+
+static void dump_pci (int enh, pci_dev_t dev)
+{
+	int ofs;
+
+	debug ("\n%s", (enh) ? "EHCI" : "OHCI");
+	for (ofs = 0; ofs < 0x44; ofs += 4)
+		dump_pci_reg (dev, ofs);
+	if (enh)
+		dump_pci_reg (dev, 0x60);
+	dump_pci_reg (dev, 0xdc);
+	dump_pci_reg (dev, 0xe0);
+	if (enh) {
+		dump_pci_reg (dev, 0xe4);
+		dump_pci_reg (dev, 0xe8);
+	}
+}
+
+static void dump_regs (void)
+{
+
+	debug ("usbcmd=%#x, usbsts=%#x, usbintr=%#x,\n\tfrindex=%#x, "
+	       "ctrldssegment=%#x, periodiclistbase=%#x,\n\tasynclistaddr=%#x, "
+	       "configflag=%#x,\n\tportsc[1]=%#x, portsc[2]=%#x, systune=%#x",
+	       swap_32 (hcor->or_usbcmd), swap_32 (hcor->or_usbsts),
+	       swap_32 (hcor->or_usbintr), swap_32 (hcor->or_frindex),
+	       swap_32 (hcor->or_ctrldssegment),
+	       swap_32 (hcor->or_periodiclistbase),
+	       swap_32 (hcor->or_asynclistaddr), swap_32 (hcor->or_configflag),
+	       swap_32 (hcor->or_portsc[0]), swap_32 (hcor->or_portsc[1]),
+	       swap_32 (hcor->or_systune));
+}
+
+static void dump_TD (struct qTD *td)
+{
+
+	debug ("%p: qt_next=%#x, qt_altnext=%#x, qt_token=%#x, "
+	       "qt_buffer={%#x,%#x,%#x,%#x,%#x}", td, swap_32 (td->qt_next),
+	       swap_32 (td->qt_altnext), swap_32 (td->qt_token),
+	       swap_32 (td->qt_buffer[0]), swap_32 (td->qt_buffer[1]),
+	       swap_32 (td->qt_buffer[2]), swap_32 (td->qt_buffer[3]),
+	       swap_32 (td->qt_buffer[4]));
+}
+
+static void dump_QH (struct QH *qh)
+{
+
+	debug ("%p: qh_link=%#x, qh_endpt1=%#x, qh_endpt2=%#x, qh_curtd=%#x",
+	       qh, swap_32 (qh->qh_link), swap_32 (qh->qh_endpt1),
+	       swap_32 (qh->qh_endpt2), swap_32 (qh->qh_curtd));
+	dump_TD (&qh->qh_overlay);
+}
+#endif
+
+/*
+ * Create the appropriate control structures to manage
+ * a new EHCI host controller.
+ */
+int ehci_hcd_init (void)
+{
+	pci_dev_t dev;
+	uint32_t addr;
+
+	dev = pci_find_device (0x1131, 0x1561, 0);
+	if (dev != -1) {
+		volatile uint32_t *hcreg;
+
+		pci_read_config_dword (dev, PCI_BASE_ADDRESS_0, &addr);
+		hcreg = (uint32_t *) (addr + 8);
+		*hcreg = swap_32 (1);
+		udelay (100);
+	}
+
+	dev = pci_find_device (0x1131, 0x1562, 0);
+	if (dev == -1) {
+		printf ("EHCI host controller not found\n");
+		return (-1);
+	}
+
+	pci_read_config_dword (dev, EHCI_PCICS_USBBASE, &addr);
+	hccr = (void *)addr;
+
+	addr += hccr->cr_caplength;
+	hcor = (void *)addr;
+
+	/* Latte/Espresso USB hardware bug workaround */
+	hcor->or_systune |= swap_32 (3);
+
+	return (0);
+}
+
+/*
+ * Destroy the appropriate control structures corresponding
+ * the the EHCI host controller.
+ */
+int ehci_hcd_stop (void)
+{
+
+	return (0);
+}
diff --git a/drivers/usb/usb_ehci_pci.h b/drivers/usb/usb_ehci_pci.h
new file mode 100644
index 0000000..6a4d16e
--- /dev/null
+++ b/drivers/usb/usb_ehci_pci.h
@@ -0,0 +1,37 @@
+/*-
+ * Copyright (c) 2007-2008, Juniper Networks, Inc.
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2 of
+ * the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * PCI Configuration Space.
+ */
+#define	EHCI_PCICS_BASEC		PCI_CLASS_CODE
+#define	EHCI_PCICS_SCC			PCI_CLASS_SUB_CODE
+#define	EHCI_PCICS_PI			PCI_CLASS_PROG
+#define	EHCI_PCICS_USBBASE		PCI_BASE_ADDRESS_0
+#define	EHCI_PCICS_SBRN			0x60
+#define	EHCI_PCICS_FLADJ		0x61
+#define	EHCI_PCICS_PORTWAKECAP		0x62
+
+#define	EHCI_PCICS_USBLEGSUP
+#define	EHCI_PCICS_USBLEGCTLSTS
+
+#define	EHCI_PCI_BASEC			0x0c	/* Serial Bus Controller. */
+#define	EHCI_PCI_SCC			0x03	/* USB Host Controller. */
+#define	EHCI_PCI_PI			0x20	/* USB 2.0 Host Controller. */
-- 
1.5.6




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