[U-Boot-Users] [PATCH 1/1] Add support for the hammerhead (AVR32) board
Ben Warren
bwarren at qstreams.com
Tue Jun 24 08:31:29 CEST 2008
Hi Julien,
Julien May wrote:
> On Mon, 23 Jun 2008, Haavard Skinnemoen wrote:
>
>
>> Julien May <mailinglist at miromico.ch> wrote:
>>
>>> Signed-off-by: Julien May <mailinglist at miromico.ch>
>>>
>> Could you add a few lines describing the Hammerhead board, perhaps with
>> a link to your site?
>>
>
> You'll find a short desc. of the hammerhead board on top of the
> inc. patch below.
>
>
Please don't do incremental patches. Just re-submit.
>> This looks pretty good to me. I have a few comments below, and I've
>> Cc'ed u-boot-users so that more people can comment on this. Please keep
>> them in the loop whenever you post a new version of this patch.
>>
>> If you want, I can apply this to my tree as is, and you can send me
>> incremental patches fixing up the remaining issues. I'll fold
>> everything into a single patch before sending it upstream.
>>
>>
>
> Would be great if you could apply the patch to your tree. Please find
> below the incremental patch that should fix all of the remaining issues.
>
> - Julien May
>
> >From 6333f6ea0a5a16d273fe1512ecacdce9fff275f5 Mon Sep 17 00:00:00 2001
> From: Julien May <mailinglist at miromico.ch>
> Date: Mon, 23 Jun 2008 16:44:44 +0200
> Subject: [PATCH 1/1] Add support for the hammerhead (AVR32) board.
>
> The Hammerhead platform is built around a AVR32 32-bit microcontroller from Atmel.
> It offers versatile peripherals, such as ethernet, usb device, usb host etc.
>
> The board also incooperates a power supply and is a Power over Ethernet (PoE) Powered Device (PD).
>
> Additonally, a Cyclone III FPGA from Altera is integrated on the board. The FPGA is mapped into the
> 32-bit AVR memory bus. The FPGA offers two DDR2 SDRAM interfaces, which will cover even the most
> exceptional need of memory bandwidth. Together with the onboard video decoder the board is ready
> for video processing.
>
> For more information see: http://www.miromico.com/hammerhead
>
> Signed-off-by: Julien May <mailinglist at miromico.ch>
> ---
> board/miromico/hammerhead/eth.c | 2 +-
> board/miromico/hammerhead/hammerhead.c | 9 ++++-----
> cpu/at32ap/at32ap700x/gpio.c | 11 -----------
> cpu/at32ap/cpu.c | 2 --
> include/asm-avr32/arch-at32ap700x/gpio.h | 3 ---
> include/configs/hammerhead.h | 14 +++-----------
> net/eth.c | 4 ++--
> 7 files changed, 10 insertions(+), 35 deletions(-)
>
> diff --git a/board/miromico/hammerhead/eth.c b/board/miromico/hammerhead/eth.c
> index 969c48e..056e9ca 100644
> --- a/board/miromico/hammerhead/eth.c
> +++ b/board/miromico/hammerhead/eth.c
> @@ -30,7 +30,7 @@
> extern int macb_eth_initialize(int id, void *regs, unsigned int phy_addr);
>
> #ifdef CONFIG_CMD_NET
> -void board_eth_initialize(bd_t *bi)
> +void board_eth_init(bd_t *bi)
> {
> macb_eth_initialize(0, (void *)MACB0_BASE, bi->bi_phy_id[0]);
> }
>
board_eth_init() returns an int. Standard UNIX, =0 on success, <0 on
failure.
> diff --git a/board/miromico/hammerhead/hammerhead.c b/board/miromico/hammerhead/hammerhead.c
> index 69ff7fa..26d1182 100644
> --- a/board/miromico/hammerhead/hammerhead.c
> +++ b/board/miromico/hammerhead/hammerhead.c
> @@ -64,10 +64,6 @@ int board_early_init_f(void)
> #if defined(CONFIG_MMC)
> gpio_enable_mmci();
> #endif
> -
> - /* Select GCLK3 peripheral function. We'll need it as clock output
> - * for ethernet PHY. */
> - gpio_enable_gclk3();
> return 0;
> }
>
> @@ -100,6 +96,9 @@ void gclk_init(void)
> {
> /* Hammerhead boards uses GCLK3 as 25MHz output to ethernet PHY */
>
> + /* Select GCLK3 peripheral function */
> + gpio_select_periph_A(GPIO_PIN_PB29, 0);
> +
> /* Enable GCLK3 with no input divider, from OSC0 (crystal) */
> - sm_writel( PM_GCCTRL(3), SM_BIT(CEN) );
> + sm_writel(PM_GCCTRL(3), SM_BIT(CEN));
> }
> diff --git a/cpu/at32ap/at32ap700x/gpio.c b/cpu/at32ap/at32ap700x/gpio.c
> index 2b7717f..859124a 100644
> --- a/cpu/at32ap/at32ap700x/gpio.c
> +++ b/cpu/at32ap/at32ap700x/gpio.c
> @@ -142,14 +142,3 @@ void gpio_enable_mmci(void)
> gpio_select_periph_A(GPIO_PIN_PA15, 0); /* DATA3 */
> }
> #endif
> -
> -/*
> - * Hammerhead board uses GCLK3 (Periph A on PB29) as 25MHz clock output
> - * for ethernet PHY.
> - */
> -void __gpio_enable_gclk3(void)
> -{
> - gpio_select_periph_A(GPIO_PIN_PB29, 0); /* GCLK3 */
> -}
> -
> -void gpio_enable_gclk3(void) __attribute__((weak, alias("__gpio_enable_gclk3")));
> diff --git a/cpu/at32ap/cpu.c b/cpu/at32ap/cpu.c
> index 4a92aab..1a13702 100644
> --- a/cpu/at32ap/cpu.c
> +++ b/cpu/at32ap/cpu.c
> @@ -66,9 +66,7 @@ int cpu_init(void)
> asm volatile("csrf %0" : : "i"(SYSREG_EM_OFFSET));
>
> if(gclk_init)
> - {
> gclk_init();
> - }
>
> return 0;
> }
> diff --git a/include/asm-avr32/arch-at32ap700x/gpio.h b/include/asm-avr32/arch-at32ap700x/gpio.h
> index c350d54..b10a3e4 100644
> --- a/include/asm-avr32/arch-at32ap700x/gpio.h
> +++ b/include/asm-avr32/arch-at32ap700x/gpio.h
> @@ -216,8 +216,5 @@ void gpio_enable_macb1(void);
> #ifdef AT32AP700x_CHIP_HAS_MMCI
> void gpio_enable_mmci(void);
> #endif
> -#ifdef CONFIG_HAMMERHEAD
> -void gpio_enable_gclk3(void);
> -#endif
>
> #endif /* __ASM_AVR32_ARCH_GPIO_H__ */
> diff --git a/include/configs/hammerhead.h b/include/configs/hammerhead.h
> index 6699aea..70123f7 100644
> --- a/include/configs/hammerhead.h
> +++ b/include/configs/hammerhead.h
> @@ -38,7 +38,7 @@
> */
> #define CONFIG_PLL 1
> #define CFG_POWER_MANAGER 1
> -#define CFG_OSC0_HZ 25000000 /* 25MHz crystal */
> +#define CFG_OSC0_HZ 25000000 /* 25MHz crystal -> 125MHz clock */
> #define CFG_PLL0_DIV 1
> #define CFG_PLL0_MUL 5
> #define CFG_PLL0_SUPPRESS_CYCLES 16
> @@ -71,7 +71,7 @@
>
> #define CONFIG_BAUDRATE 115200
> #define CONFIG_BOOTARGS \
> - "console=ttyS0 root=/dev/mtdblock1 rootfstype=jffs2"
> + "console=ttyS0 root=mtd1 rootfstype=jffs2"
> #define CONFIG_BOOTCOMMAND \
> "fsload; bootm"
>
> @@ -101,8 +101,6 @@
> #define CONFIG_BOOTP_SUBNETMASK
> #define CONFIG_BOOTP_GATEWAY
>
> -#define CONFIG_DOS_PARTITION 1
> -
> /*
> * Command line configuration.
> */
> @@ -151,12 +149,6 @@
> #define CFG_INIT_SP_ADDR (CFG_INTRAM_BASE + CFG_INTRAM_SIZE)
>
> #define CFG_MALLOC_LEN (256*1024)
> -#define CFG_MALLOC_END \
> - ({ \
> - DECLARE_GLOBAL_DATA_PTR; \
> - CFG_SDRAM_BASE + gd->sdram_size; \
> - })
> -#define CFG_MALLOC_START (CFG_MALLOC_END - CFG_MALLOC_LEN)
>
> #define CFG_DMA_ALLOC_LEN (16384)
>
> @@ -165,7 +157,7 @@
> #define CFG_BOOTPARAMS_LEN (16 * 1024)
>
> /* Other configuration settings that shouldn't have to change all that often */
> -#define CFG_PROMPT "Uboot> "
> +#define CFG_PROMPT "Hammerhead> "
> #define CFG_CBSIZE 256
> #define CFG_MAXARGS 16
> #define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16)
> diff --git a/net/eth.c b/net/eth.c
> index 054a9fd..2d6f15f 100644
> --- a/net/eth.c
> +++ b/net/eth.c
>
You won't need to touch this file. Please see how it's done in the
'next' branch of the net repo on git.denx.de.
regards,
Ben
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