[U-Boot-Users] [PATCH 2/8] SPARC: SPARC cfi-flash support for 64-bit reads

[Daniel Hellstrom]

For current SPARC architectures (LEON2 and LEON3) each read from the
FLASH must lead to a cache miss. This is because FLASH can not be set
non-cacheable since program code resides there, and alternatively disabling
cache is poor from performance view, or doing a cache flush between each 
read
is even poorer.

Forcing a cache miss on a SPARC is done by a special instruction "lda" -
load alternative space, the alternative space number (ASI) is processor
implementation spcific and can be found by including <asm/processor.h>.

SPARC has implemented __raw_readq, it reads 64-bit from any 32-bit address.

Best Regards,
Daniel Hellstrom


 drivers/mtd/cfi_flash.c |    4 ++++
 1 files changed, 4 insertions(+), 0 deletions(-)


diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index 439c950..6fc6bc4 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -241,8 +241,12 @@ static u32 flash_read32(void *addr)
 
 static u64 flash_read64(void *addr)
 {
+#ifdef CONFIG_SPARC
+    return __raw_readq(addr);
+#else
     /* No architectures currently implement __raw_readq() */
     return *(volatile u64 *)addr;
+#endif
 }
 
 /*-----------------------------------------------------------------------