[U-Boot-Users] [PATCH 2/2] DM644x: This adds support for the Prodrive PMDRA board, based on a DM6441

[Jean-Christophe PLAGNIOL-VILLARD]

On 12:28 Thu 20 Mar     , Pieter Voorthuijsen wrote:
> Hello,
> 
> This patch adds support for the new Prodrive PMDR-A board. It is based
> on the DaVinci DM6441 processor, has 256M DDR2, 8M NOR and 256M of NAND.
> (This requires the previous patch that removes board specific code from
> /cpu/arm926ejs/davinci)
> 

Hi,

Fist your patch is wrapped please resend it
us git-send-email as example

and there is some codystyle
> Best regards,
> Pieter
> 
> 
> +	if ((*mdstat & 0x1f) == 0x03)
> +		return;			/* Already on and enabled */
> +
> +	*mdctl |= 0x03;
> +
> +	/* Special treatment for some modules as for sprue14 p.7.4.2 */
> +	if (	(id == DAVINCI_LPSC_VPSSSLV) ||
> +		(id == DAVINCI_LPSC_EMAC) ||
> +		(id == DAVINCI_LPSC_EMAC_WRAPPER) ||
> +		(id == DAVINCI_LPSC_MDIO) ||
> +		(id == DAVINCI_LPSC_USB) ||
> +		(id == DAVINCI_LPSC_ATA) ||
> +		(id == DAVINCI_LPSC_VLYNQ) ||
> +		(id == DAVINCI_LPSC_UHPI) ||
> +		(id == DAVINCI_LPSC_DDR_EMIF) ||
> +		(id == DAVINCI_LPSC_AEMIF) ||
> +		(id == DAVINCI_LPSC_MMC_SD) ||
> +		(id == DAVINCI_LPSC_MEMSTICK) ||
> +		(id == DAVINCI_LPSC_McBSP) ||
> +		(id == DAVINCI_LPSC_GPIO)
> +	   )
> +	   	*mdctl |= 0x200;
        ^^^
Whitespaces please remove
> +
> +	REG(PSC_PTCMD) = 0x01;
> +
> +	while (REG(PSC_PTSTAT) & 0x03) {;}
                                       ^^^
Why not
	while (REG(PSC_PTSTAT) & 0x03) {}
or
	while (REG(PSC_PTSTAT) & 0x03) ;

> +}
> +
> +	/* Bringup UART0 and 2 out of reset */
> +//	REG(UART0_PWREMU_MGMT) = 0x0000e003; /* Why does TI use reserved
> bits or bit that MUST be set to 0? */
If no need remove it
> +	REG(UART0_PWREMU_MGMT) = 0x00006001;
> +	REG(UART2_PWREMU_MGMT) = 0x00006001;
> +	
   ^^^^^
Whitespaces please remove
> +	/* Enable GIO3.3V cells used for EMAC */
> +	REG(VDD3P3V_PWDN) = 0;
> +
> +	/* Enable UART0 and 2 MUX lines */
> +	REG(PINMUX1) |= 1; //(0)
> +	REG(PINMUX1) |= 4; //(2)
No C++ comments
> +
> +int misc_init_r (void)
> +{
> +	int		clk = 0;
> +
> +	clk = ((REG(PLL2_PLLM) + 1) * 27) / ((REG(PLL2_DIV2) & 0x1f) +
> 1);
> +
> +	printf ("ARM Clock : %dMHz\n", ((REG(PLL1_PLLM) + 1) * 27 ) /
> 2);
> +	printf ("DDR Clock : %dMHz\n", (clk / 2));
> +
> +	if (!eth_hw_init()) {
> +		printf("ethernet init failed!\n");
> +	} else {
> +		printf("ETH PHY   : %s\n", phy.name);
> +	}
please remove the bracket
> +
> +/* I2C Configuration */
> +#undef CONFIG_SKIP_LOWLEVEL_INIT
> +#undef CONFIG_SKIP_RELOCATE_UBOOT
> +#define DEF_BOOTM		""
> +#define CFG_ENV_IS_IN_FLASH	1
> +#undef CFG_NO_FLASH
No need
> +#define CFG_FLASH_CFI_DRIVER
> +#define CFG_FLASH_CFI
> +#define CFG_MAX_FLASH_BANKS	1		/* max number of flash
> banks */
> +#define CFG_ENV_ADDR		(PHYS_FLASH_1 + 0x40000)
> +#define CFG_ENV_OFFSET		(CFG_ENV_ADDR)
> +#define CFG_FLASH_USE_BUFFER_WRITE 1		/* use buffered writes
> (20x faster)     */
> +#define PHYS_FLASH_1		0x02000000	/* CS2 Base address
> */
> +#define CFG_FLASH_BASE		PHYS_FLASH_1	/* Flash Base for U-Boot
> */
> +#define PHYS_FLASH_SIZE		0x2000000	/* Flash size
> 32MB 	 */
      ^
Whitespaces please remove it
> +#define CFG_MAX_FLASH_SECT	(PHYS_FLASH_SIZE/CFG_FLASH_SECT_SZ)
> +#define CFG_ENV_SECT_SIZE	CFG_FLASH_SECT_SZ	/* Env sector
> Size */
> +#define CFG_FLASH_SECT_SZ	0x20000         /* 128KB sect size INTEL
> Flash */
> +#define CFG_FLASH_PROTECTION	1
> +/*==============================*/
> +/* U-Boot general configuration */
> +/*==============================*/
> +#undef 	CONFIG_USE_IRQ			/* No IRQ/FIQ in U-Boot
         ^
Whitespaces please remove it
> */
> +#define CONFIG_MISC_INIT_R
> +#define CONFIG_BOOTFILE		"uImage"	/* Boot file
> name */
> +#define CFG_PROMPT		"U-Boot > "	/* Monitor Command
> Prompt */
> +#define CFG_CBSIZE		1024		/* Console I/O Buffer
> Size  */
> +#define CFG_PBSIZE		(CFG_CBSIZE+sizeof(CFG_PROMPT)+16)
> /* Print buffer sz */

Check the othe too please before resend it.

Best Regards,
J.