[U-Boot-Users] Xilinx Spartan3 serial slave CRC error - bitswapping remove cause problems
Tales Toledo
toledo.tales at gmail.com
Wed Mar 26 13:08:16 CET 2008
Hi,
as mentioned in an previous e-mail (### previous console printfs ###)
I had a problem with Spartan3 serial slave when loading bitstream. I
am using 1.3.0 version with Matthias improved supported patch for FPGA
applied.
After some tests I rollback the bitstream swapping to a previous
version and voila .... everything is working now.
I think that remove bitswapping at fpga_loadbitstream is not a good
idea based on my tests for Spartan3.
Any comments about some experience with Spartan3?
####### new console printfs #############
=> tftp 100000 fpganew.bit
Using FEC ETHERNET device
TFTP from server 192.168.1.100; our IP address is 192.168.1.1
Filename 'fpganew.bit'.
Load address: 0x100000
Loading: #########
done
Bytes transferred = 131034 (1ffda hex)
=> fpga loadb 0 100000 ${filesize}
do_fpga: fpga_data = 0x100000
do_fpga: device = 0
design filename = "fpganew.ncd"
part number = "3s200tq144"
date = "2008/ 3/25"
time = "16:37:58"
bytes in bitstream = 130952
fpga_get_desc: found fpga descriptor #0 @ 0x01ffad04
Spartan3_load: Launching Slave Serial Load
Spartan3_ss_load: start with interface functions @ 0x01ff8c08
Spartan3_ss_load: Function Table:
ptr: 0x01bb6a90
struct: 0x01ff8c08
pgm: 0x01fec034
init: 0x01fec0b4
clk: 0x01fec19c
wr: 0x01fec1cc
done: 0x01fec124
Loading FPGA Device 0...
fpga_pre_fn:111: FPGA pre-configuration
fpga_pgm_fn:122: FPGA PROGRAM asserted
fpga_init_fn:145: INIT check... low
fpga_pgm_fn:122: FPGA PROGRAM deasserted
fpga_init_fn:145: INIT check... high
........................................
Done.
=>
####### previous console prints ###########
=> tftp 100000 fpganew.bit
Using FEC ETHERNET device
TFTP from server 192.168.1.100; our IP address is 192.168.1.1
Filename 'fpganew.bit'.
Load address: 0x100000
Loading: #########
done
Bytes transferred = 131034 (1ffda hex)
=> fpga loadb 0 100000 ${filesize}
do_fpga: fpga_data = 0x100000
do_fpga: device = 0
design filename = "fpga_top.ncd"
part number = "3s200tq144"
date = "2008/ 3/25"
time = "16:37:58"
bytes in bitstream = 130952
fpga_get_desc: found fpga descriptor #0 @ 0x01ffad04
Spartan3_load: Launching Slave Serial Load
Spartan3_ss_load: start with interface functions @ 0x01ff8c00
Spartan3_ss_load: Function Table:
ptr: 0x01bb6a90
struct: 0x01ff8c00
pgm: 0x01febf80
init: 0x01fec000
clk: 0x01fec0e8
wr: 0x01fec118
done: 0x01fec070
Loading FPGA Device 0...
fpga_pre_fn:111: FPGA pre-configuration
fpga_pgm_fn:122: FPGA PROGRAM asserted
fpga_init_fn:145: INIT check... low
fpga_pgm_fn:122: FPGA PROGRAM deasserted
fpga_init_fn:145: INIT check... high
........................................fpga_init_fn:145: INIT check... high
fpga_init_fn:145: INIT check... low
** CRC error during FPGA load.
bytecount=130938, bsize=130952
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