[U-Boot-Users] Configuring U-Boot for MPC8349E in little endian mode
David Hawkins
dwh at ovro.caltech.edu
Fri May 2 18:35:19 CEST 2008
Hi Vivek,
> Sorry, I forgot to tell that we are using MPC8349E processor
> with a "e300 core". And it is clearly mentioned in the e300
> core datasheet that, it supports "True little-endian mode
> for compatibility with other true little-endian devices".
Data sheets need to be read in the wider context of knowing
how the devices are 'typically used'. Just because a core
can operate in little-endian, doesn't mean you should :)
> So, according to data sheet I have done following changes
> in U-Boot to configure it in true little endian mode
The convention for this processor, and pretty much all
other PowerPCs is to operate in big-endian mode.
> We want to configure MPC8349E in little endian as some
> other PCI devices(DSPs) are operating in little endian.
>
> Any help/suggestion will be appreciated.
The PowerPC should be operated in big-endian mode, so that you
have the wider support of the community. There is absolutely
no reason to operate the processor in little-endian mode
just because you want to talk to little-endian processors
over the little-endian PCI bus.
The overhead of any required byte-swapping functions is
negligible.
Regardless of what mode your PowerPC host operates versus
your DSPs, you will have to use a communications protocol
that enforces data alignment and format, eg. a C-structure
on the DSP will more than likely not have the same layout
as the same C-structure compiled on the PowerPC. There
is the issue of endianness, but also the issue of alignment
and packing. As such you would write an encode/serialization
function to send data, and a decode/deserialization function
to decode data.
There are standardized machine independent binary formats
already defined, eg. XDR as used by NFS, and CDR as used
by CORBA. Application code written using this technique is
transparent to the endianness of the underlying processor.
I use little-endian x86 hosts to communicate with about 20
little-endian DSPs, or big-endian PowerPCs (MPC8349EAs).
The devices communicate using CDR. I use the ACE C++ library
and its CDR encode/decode functions on the x86 and PowerPCs,
while on the DSPs, I use C-structures and pack/unpack them
to match the equivalent CDR encoded functions. The overhead
of data conversion is insignificant.
I hope that given this insight you will understand why
you are recommended to operate the processor in its
'standard' big-endian mode.
Cheers,
Dave
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