[U-Boot-Users] [PATCH] arm920t: start.S coding style cleanup

Jean-Christophe PLAGNIOL-VILLARD plagnioj at jcrosoft.com
Sun May 4 21:16:55 CEST 2008


Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
 cpu/arm920t/start.S |  178 +++++++++++++++++++++++++--------------------------
 1 files changed, 88 insertions(+), 90 deletions(-)

diff --git a/cpu/arm920t/start.S b/cpu/arm920t/start.S
index acc00ad..3067d8c 100644
--- a/cpu/arm920t/start.S
+++ b/cpu/arm920t/start.S
@@ -1,9 +1,9 @@
 /*
- *  armboot - Startup Code for ARM920 CPU-core
+ * armboot - Startup Code for ARM920 CPU-core
  *
- *  Copyright (c) 2001	Marius Gröger <mag at sysgo.de>
- *  Copyright (c) 2002	Alex Züpke <azu at sysgo.de>
- *  Copyright (c) 2002	Gary Jennejohn <gj at denx.de>
+ * Copyright (c) 2001	Marius Gröger <mag at sysgo.de>
+ * Copyright (c) 2002	Alex Züpke <azu at sysgo.de>
+ * Copyright (c) 2002	Gary Jennejohn <gj at denx.de>
  *
  * See file CREDITS for list of people who contributed to this
  * project.
@@ -39,7 +39,7 @@
 
 
 .globl _start
-_start:	b       start_code
+_start:	b	start_code
 	ldr	pc, _undefined_instruction
 	ldr	pc, _software_interrupt
 	ldr	pc, _prefetch_abort
@@ -77,18 +77,18 @@ _TEXT_BASE:
 
 .globl _armboot_start
 _armboot_start:
-	.word _start
+	.word	_start
 
 /*
  * These are defined in the board-specific linker script.
  */
 .globl _bss_start
 _bss_start:
-	.word __bss_start
+	.word	__bss_start
 
 .globl _bss_end
 _bss_end:
-	.word _end
+	.word	_end
 
 #ifdef CONFIG_USE_IRQ
 /* IRQ stack memory (calculated at run-time) */
@@ -99,7 +99,7 @@ IRQ_STACK_START:
 /* IRQ stack memory (calculated at run-time) */
 .globl FIQ_STACK_START
 FIQ_STACK_START:
-	.word 0x0badc0de
+	.word	0x0badc0de
 #endif
 
 
@@ -111,10 +111,10 @@ start_code:
 	/*
 	 * set the cpu to SVC32 mode
 	 */
-	mrs	r0,cpsr
-	bic	r0,r0,#0x1f
-	orr	r0,r0,#0xd3
-	msr	cpsr,r0
+	mrs	r0, cpsr
+	bic	r0, r0, #0x1f
+	orr	r0, r0, #0xd3
+	msr	cpsr, r0
 
 	bl coloured_LED_init
 	bl red_LED_on
@@ -136,20 +136,20 @@ copyex:
 #if defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410)
 	/* turn off the watchdog */
 
-# if defined(CONFIG_S3C2400)
-#  define pWTCON		0x15300000
-#  define INTMSK		0x14400008	/* Interupt-Controller base addresses */
-#  define CLKDIVN	0x14800014	/* clock divisor register */
+#if defined(CONFIG_S3C2400)
+#define pWTCON		0x15300000
+#define INTMSK		0x14400008	/* Interupt-Controller base addresses */
+#define CLKDIVN		0x14800014	/* clock divisor register */
 #else
-#  define pWTCON		0x53000000
-#  define INTMSK		0x4A000008	/* Interupt-Controller base addresses */
-#  define INTSUBMSK	0x4A00001C
-#  define CLKDIVN	0x4C000014	/* clock divisor register */
+#define pWTCON		0x53000000
+#define INTMSK		0x4A000008	/* Interupt-Controller base addresses */
+#define INTSUBMSK	0x4A00001C
+#define CLKDIVN		0x4C000014	/* clock divisor register */
 # endif
 
-	ldr     r0, =pWTCON
-	mov     r1, #0x0
-	str     r1, [r0]
+	ldr	r0, =pWTCON
+	mov	r1, #0x0
+	str	r1, [r0]
 
 	/*
 	 * mask all IRQs by setting all bits in the INTMR - default
@@ -157,11 +157,11 @@ copyex:
 	mov	r1, #0xffffffff
 	ldr	r0, =INTMSK
 	str	r1, [r0]
-# if defined(CONFIG_S3C2410)
+#if defined(CONFIG_S3C2410)
 	ldr	r1, =0x3ff
 	ldr	r0, =INTSUBMSK
 	str	r1, [r0]
-# endif
+#endif
 
 	/* FCLK:HCLK:PCLK = 1:2:4 */
 	/* default FCLK is 120 MHz ! */
@@ -181,40 +181,40 @@ copyex:
 #ifndef	CONFIG_AT91RM9200
 
 #ifndef CONFIG_SKIP_RELOCATE_UBOOT
-relocate:				/* relocate U-Boot to RAM	    */
-	adr	r0, _start		/* r0 <- current position of code   */
+relocate:				/* relocate U-Boot to RAM */
+	adr	r0, _start		/* r0 <- current position of code */
 	ldr	r1, _TEXT_BASE		/* test if we run from flash or RAM */
-	cmp     r0, r1                  /* don't reloc during debug         */
-	beq     stack_setup
+	cmp	r0, r1			/* don't reloc during debug */
+	beq	stack_setup
 
 	ldr	r2, _armboot_start
 	ldr	r3, _bss_start
-	sub	r2, r3, r2		/* r2 <- size of armboot            */
-	add	r2, r0, r2		/* r2 <- source end address         */
+	sub	r2, r3, r2		/* r2 <- size of armboot */
+	add	r2, r0, r2		/* r2 <- source end address */
 
 copy_loop:
-	ldmia	r0!, {r3-r10}		/* copy from source address [r0]    */
-	stmia	r1!, {r3-r10}		/* copy to   target address [r1]    */
-	cmp	r0, r2			/* until source end addreee [r2]    */
+	ldmia	r0!, {r3-r10}		/* copy from source address [r0] */
+	stmia	r1!, {r3-r10}		/* copy to target address [r1] */
+	cmp	r0, r2			/* until source end addreee [r2] */
 	ble	copy_loop
 #endif	/* CONFIG_SKIP_RELOCATE_UBOOT */
-#endif
-	/* Set up the stack						    */
+#endif	/* !CONFIG_AT91RM9200 */
+	/* Set up the stack */
 stack_setup:
-	ldr	r0, _TEXT_BASE		/* upper 128 KiB: relocated uboot   */
-	sub	r0, r0, #CFG_MALLOC_LEN	/* malloc area                      */
-	sub	r0, r0, #CFG_GBL_DATA_SIZE /* bdinfo                        */
+	ldr	r0, _TEXT_BASE		/* upper 128 KiB: relocated uboot */
+	sub	r0, r0, #CFG_MALLOC_LEN	/* malloc area */
+	sub	r0, r0, #CFG_GBL_DATA_SIZE /* bdinfo */
 #ifdef CONFIG_USE_IRQ
 	sub	r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
 #endif
-	sub	sp, r0, #12		/* leave 3 words for abort-stack    */
+	sub	sp, r0, #12		/* leave 3 words for abort-stack */
 
 clear_bss:
-	ldr	r0, _bss_start		/* find start of bss segment        */
-	ldr	r1, _bss_end		/* stop here                        */
-	mov 	r2, #0x00000000		/* clear                            */
+	ldr	r0, _bss_start		/* find start of bss segment */
+	ldr	r1, _bss_end		/* stop here */
+	mov	r2, #0x00000000		/* clear */
 
-clbss_l:str	r2, [r0]		/* clear loop...                    */
+clbss_l:str	r2, [r0]		/* clear loop... */
 	add	r0, r0, #4
 	cmp	r0, r1
 	ble	clbss_l
@@ -223,7 +223,6 @@ clbss_l:str	r2, [r0]		/* clear loop...                    */
 
 _start_armboot:	.word start_armboot
 
-
 /*
  *************************************************************************
  *
@@ -235,7 +234,6 @@ _start_armboot:	.word start_armboot
  *************************************************************************
  */
 
-
 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
 cpu_init_crit:
 	/*
@@ -249,10 +247,10 @@ cpu_init_crit:
 	 * disable MMU stuff and caches
 	 */
 	mrc	p15, 0, r0, c1, c0, 0
-	bic	r0, r0, #0x00002300	@ clear bits 13, 9:8 (--V- --RS)
-	bic	r0, r0, #0x00000087	@ clear bits 7, 2:0 (B--- -CAM)
-	orr	r0, r0, #0x00000002	@ set bit 2 (A) Align
-	orr	r0, r0, #0x00001000	@ set bit 12 (I) I-Cache
+	bic	r0, r0, #0x00002300	/* clear bits 13, 9:8 (--V- --RS) */
+	bic	r0, r0, #0x00000087	/* clear bits 7, 2:0 (B--- -CAM) */
+	orr	r0, r0, #0x00000002	/* set bit 2 (A) Align */
+	orr	r0, r0, #0x00001000	/* set bit 12 (I) I-Cache */
 	mcr	p15, 0, r0, c1, c0, 0
 
 	/*
@@ -261,7 +259,7 @@ cpu_init_crit:
 	 * find a lowlevel_init.S in your board directory.
 	 */
 	mov	ip, lr
-#if	defined(CONFIG_AT91RM9200DK) || defined(CONFIG_AT91RM9200EK) || defined(CONFIG_AT91RM9200DF)
+#if defined(CONFIG_AT91RM9200DK) || defined(CONFIG_AT91RM9200EK) || defined(CONFIG_AT91RM9200DF)
 
 #else
 	bl	lowlevel_init
@@ -278,9 +276,9 @@ cpu_init_crit:
  *************************************************************************
  */
 
-@
-@ IRQ stack frame.
-@
+/*
+ * IRQ stack frame.
+ */
 #define S_FRAME_SIZE	72
 
 #define S_OLD_R0	68
@@ -303,8 +301,8 @@ cpu_init_crit:
 #define S_R1		4
 #define S_R0		0
 
-#define MODE_SVC 0x13
-#define I_BIT	 0x80
+#define MODE_SVC	0x13
+#define I_BIT		0x80
 
 /*
  * use bad_save_user_regs for abort/prefetch/undef/swi ...
@@ -313,95 +311,95 @@ cpu_init_crit:
 
 	.macro	bad_save_user_regs
 	sub	sp, sp, #S_FRAME_SIZE
-	stmia	sp, {r0 - r12}			@ Calling r0-r12
+	stmia	sp, {r0 - r12}			/* Calling r0-r12 */
 	ldr	r2, _armboot_start
 	sub	r2, r2, #(CONFIG_STACKSIZE+CFG_MALLOC_LEN)
-	sub	r2, r2, #(CFG_GBL_DATA_SIZE+8)  @ set base 2 words into abort stack
-	ldmia	r2, {r2 - r3}			@ get pc, cpsr
-	add	r0, sp, #S_FRAME_SIZE		@ restore sp_SVC
+	sub	r2, r2, #(CFG_GBL_DATA_SIZE+8)	/* set base 2 words into abort stack */
+	ldmia	r2, {r2 - r3}			/* get pc, cpsr */
+	add	r0, sp, #S_FRAME_SIZE		/* restore sp_SVC */
 
 	add	r5, sp, #S_SP
 	mov	r1, lr
-	stmia	r5, {r0 - r3}			@ save sp_SVC, lr_SVC, pc, cpsr
+	stmia	r5, {r0 - r3}			/* save sp_SVC, lr_SVC, pc, cpsr */
 	mov	r0, sp
 	.endm
 
 	.macro	irq_save_user_regs
 	sub	sp, sp, #S_FRAME_SIZE
-	stmia	sp, {r0 - r12}			@ Calling r0-r12
-	add     r7, sp, #S_PC
-	stmdb   r7, {sp, lr}^                   @ Calling SP, LR
-	str     lr, [r7, #0]                    @ Save calling PC
-	mrs     r6, spsr
-	str     r6, [r7, #4]                    @ Save CPSR
-	str     r0, [r7, #8]                    @ Save OLD_R0
+	stmia	sp, {r0 - r12}			/* Calling r0-r12 */
+	add	r7, sp, #S_PC
+	stmdb	r7, {sp, lr}^			/* Calling SP, LR */
+	str	lr, [r7, #0]			/* Save calling PC */
+	mrs	r6, spsr
+	str	r6, [r7, #4]			/* Save CPSR */
+	str	r0, [r7, #8]			/* Save OLD_R0 */
 	mov	r0, sp
 	.endm
 
 	.macro	irq_restore_user_regs
-	ldmia	sp, {r0 - lr}^			@ Calling r0 - lr
+	ldmia	sp, {r0 - lr}^			/* Calling r0 - lr */
 	mov	r0, r0
-	ldr	lr, [sp, #S_PC]			@ Get PC
+	ldr	lr, [sp, #S_PC]			/* Get PC */
 	add	sp, sp, #S_FRAME_SIZE
-	subs	pc, lr, #4			@ return & move spsr_svc into cpsr
+	subs	pc, lr, #4			/* return & move spsr_svc into cpsr */
 	.endm
 
 	.macro get_bad_stack
-	ldr	r13, _armboot_start		@ setup our mode stack
+	ldr	r13, _armboot_start		/* setup our mode stack */
 	sub	r13, r13, #(CONFIG_STACKSIZE+CFG_MALLOC_LEN)
-	sub	r13, r13, #(CFG_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack
+	sub	r13, r13, #(CFG_GBL_DATA_SIZE+8) /* reserved a couple spots in abort stack */
 
-	str	lr, [r13]			@ save caller lr / spsr
+	str	lr, [r13]			/* save caller lr / spsr */
 	mrs	lr, spsr
-	str     lr, [r13, #4]
+	str	lr, [r13, #4]
 
-	mov	r13, #MODE_SVC			@ prepare SVC-Mode
-	@ msr	spsr_c, r13
+	mov	r13, #MODE_SVC			/* prepare SVC-Mode */
+	/* msr	spsr_c, r13 */
 	msr	spsr, r13
 	mov	lr, pc
 	movs	pc, lr
 	.endm
 
-	.macro get_irq_stack			@ setup IRQ stack
+	.macro get_irq_stack			/* setup IRQ stack */
 	ldr	sp, IRQ_STACK_START
 	.endm
 
-	.macro get_fiq_stack			@ setup FIQ stack
+	.macro get_fiq_stack			/* setup FIQ stack */
 	ldr	sp, FIQ_STACK_START
 	.endm
 
 /*
  * exception handlers
  */
-	.align  5
+	.align	5
 undefined_instruction:
 	get_bad_stack
 	bad_save_user_regs
-	bl 	do_undefined_instruction
+	bl	do_undefined_instruction
 
 	.align	5
 software_interrupt:
 	get_bad_stack
 	bad_save_user_regs
-	bl 	do_software_interrupt
+	bl	do_software_interrupt
 
 	.align	5
 prefetch_abort:
 	get_bad_stack
 	bad_save_user_regs
-	bl 	do_prefetch_abort
+	bl	do_prefetch_abort
 
 	.align	5
 data_abort:
 	get_bad_stack
 	bad_save_user_regs
-	bl 	do_data_abort
+	bl	do_data_abort
 
 	.align	5
 not_used:
 	get_bad_stack
 	bad_save_user_regs
-	bl 	do_not_used
+	bl	do_not_used
 
 #ifdef CONFIG_USE_IRQ
 
@@ -409,7 +407,7 @@ not_used:
 irq:
 	get_irq_stack
 	irq_save_user_regs
-	bl 	do_irq
+	bl	do_irq
 	irq_restore_user_regs
 
 	.align	5
@@ -417,7 +415,7 @@ fiq:
 	get_fiq_stack
 	/* someone ought to write a more effiction fiq_save_user_regs */
 	irq_save_user_regs
-	bl 	do_fiq
+	bl	do_fiq
 	irq_restore_user_regs
 
 #else
@@ -426,12 +424,12 @@ fiq:
 irq:
 	get_bad_stack
 	bad_save_user_regs
-	bl 	do_irq
+	bl	do_irq
 
 	.align	5
 fiq:
 	get_bad_stack
 	bad_save_user_regs
-	bl 	do_fiq
+	bl	do_fiq
 
 #endif
-- 
1.5.4.5





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