[U-Boot-Users] [GIT PULL] MIPS updates

[Shinya Kuribayashi]

Dear Wolfgang,

please pull MIPS update.
Patch attached below. This will fix build warnings on cache.S.

thanks,

  Shinya

---

The following changes since commit 908261f3fdb418091d8c60bfbd7eb85e5869b579:
  Wolfgang Denk (1):
        Merge branch 'master' of git+ssh://10.10.0.7/home/wd/git/u-boot/master

are available in the git repository at:

  git://git.denx.de/u-boot-mips.git master

Shinya Kuribayashi (1):
      [MIPS] cpu/mips/cache.S: Fix build warning

 cpu/mips/cache.S |    6 ++++--
 1 files changed, 4 insertions(+), 2 deletions(-)

---

[MIPS] cpu/mips/cache.S: Fix build warning

Some old GNU assemblers, such as v2.14 (ELDK 3.1.1), v2.16 (ELDK 4.1.0),
warns illegal global symbol references by bal (and jal also) instruction.
This does not happen with the latest binutils v2.18.

Here's an example on gth2_config:

mips_4KC-gcc  -D__ASSEMBLY__ -g  -Os   -D__KERNEL__ -DTEXT_BASE=0x90000000 -I/home/skuribay/devel/u-boot.git/include -fno-builtin -ffreestanding -nostdinc -isy
stem /opt/eldk311/usr/bin/../lib/gcc-lib/mips-linux/3.3.3/include -pipe  -DCONFIG_MIPS -D__MIPS__ -G 0 -mabicalls -fpic -pipe -msoft-float -march=4kc -mtune=4k
c -EB -c -o cache.o cache.S
cache.S: Assembler messages:
cache.S:243: Warning: Pretending global symbol used as branch target is local.
cache.S:250: Warning: Pretending global symbol used as branch target is local.

In principle, gas might be sensitive to global symbol references in PIC
code because they should be processed through GOT (global offset table).
But if `bal' instruction is used, it results in PC-based offset jump.
This is the cause of this warning.

In practice, we know it doesn't matter whether PC-based reference or GOT-
based. As for this case, both will work before/after relocation. But let's
fix the code.

This patch explicitly sets up a target address, then jump there.
Here's an example of disassembled code before/after this patch.

 90000668:       1485ffef        bne     a0,a1,90000628 <mips_cache_reset+0x20>
 9000066c:       ac80fffc        sw      zero,-4(a0)
 90000670:       01402821        move    a1,t2
-90000674:       0411ffba        bal     90000560 <mips_init_icache>
-90000678:       01803021        move    a2,t4
-9000067c:       01602821        move    a1,t3
-90000680:       0411ffcc        bal     900005b4 <mips_init_dcache>
-90000684:       01a03021        move    a2,t5
-90000688:       03000008        jr      t8
-9000068c:       00000000        nop
+90000674:       01803021        move    a2,t4
+90000678:       8f8f83ec        lw      t7,-31764(gp)
+9000067c:       01e0f809        jalr    t7
+90000680:       00000000        nop
+90000684:       01602821        move    a1,t3
+90000688:       01a03021        move    a2,t5
+9000068c:       8f8f81e0        lw      t7,-32288(gp)
+90000690:       01e0f809        jalr    t7
+90000694:       00000000        nop
+90000698:       03000008        jr      t8
+9000069c:       00000000        nop

Signed-off-by: Shinya Kuribayashi <skuribay at ruby.dti.ne.jp>
---

 cpu/mips/cache.S |    6 ++++--
 1 files changed, 4 insertions(+), 2 deletions(-)


diff --git a/cpu/mips/cache.S b/cpu/mips/cache.S
index 428d251..1b0efc3 100644
--- a/cpu/mips/cache.S
+++ b/cpu/mips/cache.S
@@ -240,14 +240,16 @@ NESTED(mips_cache_reset, 0, ra)
 	 */
 	move	a1, t2
 	move	a2, t4
-	bal	mips_init_icache
+	PTR_LA	t7, mips_init_icache
+	jalr	t7
 
 	/*
 	 * then initialize D-cache.
 	 */
 	move	a1, t3
 	move	a2, t5
-	bal	mips_init_dcache
+	PTR_LA	t7, mips_init_dcache
+	jalr	t7
 
 	jr	RA
 	END(mips_cache_reset)