[U-Boot-Users] [PATCH][resubmission] three text/comment typos in 1.3.3-rc2
Adrian Filipi
adrian.filipi at eurotech.com
Tue May 6 22:46:37 CEST 2008
On Sun, 4 May 2008, Wolfgang Denk wrote:
> Sorry, patch does not apply:
>
> error: patch failed: README:623
> error: README: patch does not apply
> error: patch failed: cpu/arm920t/s3c24x0/usb.c:69
> error: cpu/arm920t/s3c24x0/usb.c: patch does not apply
> error: patch failed: doc/README.nand-boot-ppc440:9
> error: doc/README.nand-boot-ppc440: patch does not apply
> fatal: sha1 information is lacking or useless (README).
> Repository lacks necessary blobs to fall back on 3-way merge.
> Cannot fall back to three-way merge.
> Patch failed at 0001.
>
>
> Please clean up and resubmit.
>
> I strongly recommend to use git-format-patch to generate trhe patch,
> and use git-send-email to send it.
>
> Best regards,
>
> Wolfgang Denk
Sorry about that. This patch applies cleanly to 1.3.3-rc3.
I'm starting to familiarize myself with git, so I'll try to send
git-diffs next time.
Adrian
--
Linux Software Engineer | EuroTech, Inc. | www.eurotech-inc.com
----------------------------
This patch fixes three typos.
The first is a repetition of CONFIG_CMD_BSP.
The second makes the #endif comment match its #if.
The third is a spelling error.
Signed-off-by: Adrian Filipi <adrian.filipi at eurotech.com>
diff -u -ruN u-boot-1.3.3-rc3.orig/README u-boot-1.3.3-rc3/README
--- u-boot-1.3.3-rc3.orig/README 2008-05-04 06:10:33.000000000 -0400
+++ u-boot-1.3.3-rc3/README 2008-05-05 09:20:45.000000000 -0400
@@ -623,7 +623,6 @@
CONFIG_CMD_SPI * SPI serial bus support
CONFIG_CMD_USB * USB support
CONFIG_CMD_VFD * VFD support (TRAB)
- CONFIG_CMD_BSP * Board SPecific functions
CONFIG_CMD_CDP * Cisco Discover Protocol support
CONFIG_CMD_FSL * Microblaze FSL support
diff -u -ruN u-boot-1.3.3-rc3.orig/cpu/arm920t/s3c24x0/usb.c u-boot-1.3.3-rc3/cpu/arm920t/s3c24x0/usb.c
--- u-boot-1.3.3-rc3.orig/cpu/arm920t/s3c24x0/usb.c 2008-05-04 06:10:33.000000000 -0400
+++ u-boot-1.3.3-rc3/cpu/arm920t/s3c24x0/usb.c 2008-05-06 14:24:16.000000000 -0400
@@ -69,4 +69,4 @@
}
# endif /* defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410) */
-#endif /* defined(CONFIG_USB_OHCI) && defined(CFG_USB_OHCI_CPU_INIT) */
+#endif /* defined(CONFIG_USB_OHCI_NEW) && defined(CFG_USB_OHCI_CPU_INIT) */
diff -u -ruN u-boot-1.3.3-rc3.orig/doc/README.nand-boot-ppc440 u-boot-1.3.3-rc3/doc/README.nand-boot-ppc440
--- u-boot-1.3.3-rc3.orig/doc/README.nand-boot-ppc440 2008-05-04 06:10:33.000000000 -0400
+++ u-boot-1.3.3-rc3/doc/README.nand-boot-ppc440 2008-05-05 09:19:11.000000000 -0400
@@ -9,7 +9,7 @@
completely without NOR FLASH. This can be done by using the NAND
boot feature of the 440 NAND flash controller (NDFC).
-Here a short desciption of the different boot stages:
+Here a short description of the different boot stages:
a) IPL (Initial Program Loader, integrated inside CPU)
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