[U-Boot-Users] [PATCH] Fixed reset for syscon3

[Haiying Wang]

Wolfgang,

I don't think this patch is necessary because for all e500v2 core,
setting RSTCR is the right way to reset the board.

I think you should check board FPGA. I met the similar problem before.
Since FPGA did not correctly route the HRESET_REQ signal, setting RSTCR
did not cause reset. After hardware person fixed the FPGA code, it
worked fine.

Haiying

On Fri, 2008-05-09 at 17:51 +0200, Wolfgang Denk wrote:
> Hi Andy,
> 
> could you please have a look at this patch?
> 
> The situation is that we don't understand why  it's  necessary  -  we
> have  verified  that  the correct register (RSTCR at IMMR+0xe00b0) is
> updated with the correct value (0x2), but this doesn't cause a reset.
> Documentation states that no other prerequisites  or  conditions  are
> required for hard reset to work.
> 
> We have the same problem in Linux, too.
> 
> This is on a custom MPC8548 board...
> 
> Any ideas what might be causing such behaviour and/or how to avoid
> this?
> 
> Thanks in advance.
> 
> Best regards,
> 
> Wolfgang Denk
>