[U-Boot-Users] [Patch] Configure SMC for a second flash device if required

[Christian Eggers]

If SMC_CSR2_VAL is defined in the board configuration file,
the static memory controller will be configured for it.
---
 cpu/arm920t/at91rm9200/lowlevel_init.S |   10 ++++++++--
 1 files changed, 8 insertions(+), 2 deletions(-)

diff --git a/cpu/arm920t/at91rm9200/lowlevel_init.S 
b/cpu/arm920t/at91rm9200/lowlevel_init.S
index 98363eb..bb4b95f 100644
--- a/cpu/arm920t/at91rm9200/lowlevel_init.S
+++ b/cpu/arm920t/at91rm9200/lowlevel_init.S
@@ -47,6 +47,7 @@
 #define MC_AASR                0xFFFFFF08
 #define EBI_CFGR       0xFFFFFF64
 #define SMC_CSR0       0xFFFFFF70
+#define SMC_CSR2       0xFFFFFF78

 /* clocks */
 #define PLLAR          0xFFFFFC28
@@ -96,7 +97,7 @@ LoopOsc:
        ldr     r0, =SMRDATA
        ldr     r1, _MTEXT_BASE
        sub     r0, r0, r1
-       add     r2, r0, #80
+       add     r2, r0, #(SMRDATA1-SMRDATA)
 0:
        /* the address */
        ldr     r1, [r0], #4
@@ -113,7 +114,7 @@ LoopOsc:
        ldr     r0, =SMRDATA1
        ldr     r1, _MTEXT_BASE
        sub     r0, r0, r1
-       add     r2, r0, #176
+       add     r2, r0, #(SMRDATA2-SMRDATA1)
 2:
        /* the address */
        ldr     r1, [r0], #4
@@ -148,6 +149,10 @@ SMRDATA:
        .word EBI_CFGR_VAL
        .word SMC_CSR0
        .word SMC_CSR0_VAL
+#ifdef SMC_CSR2_VAL
+       .word SMC_CSR2
+       .word SMC_CSR2_VAL
+#endif
        .word PLLAR
        .word PLLAR_VAL
        .word PLLBR
@@ -202,4 +207,5 @@ SMRDATA1:
        .word SDRAM
        .word SDRAM_VAL
        /* SMRDATA1 is 176 bytes long */
+SMRDATA2:
 #endif /* CONFIG_SKIP_LOWLEVEL_INIT */
--
1.4.3.4


Signed-off-by: Christian Eggers <ceggers at gmx.de>