[U-Boot-Users] [MIPS] Convert CPU type name into CONFIG_CPU_*

[Shinya Kuribayashi]

Adjust to the current Linux way.

Signed-off-by: Shinya Kuribayashi <skuribay at ruby.dti.ne.jp>
---

 include/configs/dbau1x00.h  |    2 +-
 include/configs/gth2.h      |    2 +-
 include/configs/incaip.h    |    2 +-
 include/configs/pb1x00.h    |    2 +-
 include/configs/purple.h    |    2 +-
 include/configs/qemu-mips.h |    2 +-
 include/configs/tb0229.h    |    2 +-
 7 files changed, 7 insertions(+), 7 deletions(-)


diff --git a/include/configs/dbau1x00.h b/include/configs/dbau1x00.h
index b2f606f..ddb98ac 100644
--- a/include/configs/dbau1x00.h
+++ b/include/configs/dbau1x00.h
@@ -28,7 +28,7 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#define CONFIG_MIPS32		1  /* MIPS32 CPU core	*/
+#define CONFIG_CPU_MIPS32_R1	1  /* MIPS32 CPU core	*/
 #define CONFIG_DBAU1X00		1
 #define CONFIG_AU1X00		1  /* alchemy series cpu */
 
diff --git a/include/configs/gth2.h b/include/configs/gth2.h
index c2a50c1..50487fa 100644
--- a/include/configs/gth2.h
+++ b/include/configs/gth2.h
@@ -28,7 +28,7 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#define CONFIG_MIPS32		1  /* MIPS32 CPU core	*/
+#define CONFIG_CPU_MIPS32_R1	1  /* MIPS32 CPU core	*/
 #define CONFIG_GTH2		1
 #define CONFIG_AU1X00		1  /* alchemy series cpu */
 
diff --git a/include/configs/incaip.h b/include/configs/incaip.h
index 5ca00b3..430626d 100644
--- a/include/configs/incaip.h
+++ b/include/configs/incaip.h
@@ -28,7 +28,7 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#define CONFIG_MIPS32		1	/* MIPS 4Kc CPU core	*/
+#define CONFIG_CPU_MIPS32_R1	1	/* MIPS 4Kc CPU core	*/
 #define CONFIG_INCA_IP		1	/* on a INCA-IP Board	*/
 
 #ifndef	CPU_CLOCK_RATE
diff --git a/include/configs/pb1x00.h b/include/configs/pb1x00.h
index 810e0f0..899959a 100644
--- a/include/configs/pb1x00.h
+++ b/include/configs/pb1x00.h
@@ -28,7 +28,7 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#define CONFIG_MIPS32		1  /* MIPS32 CPU core	*/
+#define CONFIG_CPU_MIPS32_R1	1  /* MIPS32 CPU core	*/
 #define CONFIG_PB1X00		1
 #define CONFIG_AU1X00		1  /* alchemy series cpu */
 
diff --git a/include/configs/purple.h b/include/configs/purple.h
index 1be4e05..f867efd 100644
--- a/include/configs/purple.h
+++ b/include/configs/purple.h
@@ -28,7 +28,7 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#define CONFIG_MIPS32		1	/* MIPS 5Kc CPU core	*/
+#define CONFIG_CPU_MIPS32_R1	1	/* MIPS 5Kc CPU core	*/
 #define CONFIG_PURPLE		1	/* on a PURPLE Board	*/
 
 #define CPU_CLOCK_RATE	125000000   /* 125 MHz clock for the MIPS core */
diff --git a/include/configs/qemu-mips.h b/include/configs/qemu-mips.h
index d6bcc8e..98a07a6 100644
--- a/include/configs/qemu-mips.h
+++ b/include/configs/qemu-mips.h
@@ -28,7 +28,7 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#define CONFIG_MIPS32		1	/* MIPS32 CPU core */
+#define CONFIG_CPU_MIPS32_R1	1	/* MIPS32 CPU core */
 #define CONFIG_QEMU_MIPS	1
 #define CONFIG_MISC_INIT_R
 
diff --git a/include/configs/tb0229.h b/include/configs/tb0229.h
index dadf5d3..841f92d 100644
--- a/include/configs/tb0229.h
+++ b/include/configs/tb0229.h
@@ -25,7 +25,7 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#define CONFIG_MIPS32		1	/* MIPS 4Kc CPU core	*/
+#define CONFIG_CPU_VR41XX	1	/* MIPS VR4131 CPU core	*/
 #define CONFIG_TB0229		1	/* on a TB0229 Board	*/
 
 #ifndef CPU_CLOCK_RATE