[U-Boot-Users] [PATCH] Add sata sil3114 support

[Jean-Christophe PLAGNIOL-VILLARD]

On 11:52 Tue 27 May     , Tor Krill wrote:
> Add support for Silicon Images sil3114 sata chip using libata
> 
> Signed-off-by: Tor Krill <tor at excito.com>
> ---
>  drivers/block/Makefile       |    1 +
>  drivers/block/sata_sil3114.c |  845 ++++++++++++++++++++++++++++++++++++++++++
>  drivers/block/sata_sil3114.h |  148 ++++++++
>  3 files changed, 994 insertions(+), 0 deletions(-)
>  create mode 100644 drivers/block/sata_sil3114.c
>  create mode 100644 drivers/block/sata_sil3114.h
> 
> diff --git a/drivers/block/Makefile b/drivers/block/Makefile
> index 5f1298d..a09cd2a 100644
> --- a/drivers/block/Makefile
> +++ b/drivers/block/Makefile
> @@ -29,6 +29,7 @@ COBJS-y += ahci.o
>  COBJS-y += ata_piix.o
>  COBJS-$(CONFIG_FSL_SATA) += fsl_sata.o
>  COBJS-$(CONFIG_LIBATA) += libata.o
> +COBJS-$(CONFIG_SATA_SIL3114) += sata_sil3114.o
>  COBJS-y += sil680.o
>  COBJS-y += sym53c8xx.o
>  COBJS-y += systemace.o
> diff --git a/drivers/block/sata_sil3114.c b/drivers/block/sata_sil3114.c
> new file mode 100644
> index 0000000..bdc22d3
> --- /dev/null
> +++ b/drivers/block/sata_sil3114.c
> @@ -0,0 +1,845 @@
> +/*
> + * Copyright (C) Excito Elektronik i Skåne AB, All rights reserved.
> + * Author: Tor Krill <tor at excito.com>
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + *
> + * This is a driver for Silicon Image sil3114 sata chip modelled on
> + * the ata_piix driver
> + */
> +
> +
> +#include <common.h>
> +#include <pci.h>
> +#include <command.h>
> +#include <config.h>
> +#include <asm/byteorder.h>
> +#include <asm/io.h>
> +#include <ide.h>
> +#include <libata.h>
> +#include "sata_sil3114.h"
> +
> +/* Convert sectorsize to wordsize */
> +#define ATA_SECTOR_WORDS (ATA_SECT_SIZE/2)
> +
> +/* Excerpts from sata.h and cmd_sata.c */
> +#define DEBUG_SATA	0		/*For debug prints set DEBUG_SATA to 1 */
> +
> +#if (DEBUG_SATA)
> +#define PRINTF(fmt,args...)	printf (fmt ,##args)
> +#else
> +#define PRINTF(fmt,args...)
> +#endif
Is it possible to use debug() instead of PRINTF?
> +
> +/* Forwards */
> +u8 sil3114_spin_up(int num);
> +u8 sil3114_spin_down(int num);
> +static int sata_bus_softreset(int num);
> +static void sata_identify(int num, int dev);
> +static u8 check_power_mode(int num);
> +static void sata_port(struct sata_ioports *ioport);
> +static void set_Feature_cmd(int num, int dev);
> +static u8 sata_busy_wait(struct sata_ioports *ioaddr, int bits, unsigned int max, u8 usealtstatus);
> +static u8 sata_chk_status(struct sata_ioports * ioaddr, u8 usealtstatus);
> +static void msleep(int count);
> +
> +static u32 iobase[6]={0,0,0,0,0,0}; /* PCI BAR registers for our device */
please replace with
static u32 iobase[6] = {0, 0, 0, 0, 0, 0}; /* PCI BAR registers for our device */

> +extern block_dev_desc_t sata_dev_desc[CFG_SATA_MAX_DEVICE];
> +
> +static struct sata_port port[CFG_SATA_MAX_DEVICE];
> +
> +static void output_data(struct sata_ioports *ioaddr, u16 * sect_buf, int words)
> +{
> +	while(words--){
                      ^
please add a space
> +		__raw_writew(*sect_buf++,(void *)ioaddr->data_addr);
                                         ^
same
> +	}
> +}
> +
> +static int input_data(struct sata_ioports *ioaddr, u16 * sect_buf, int words)
> +{
> +	while(words--){
> +		*sect_buf++=__raw_readw((void *)ioaddr->data_addr);
> +	}
> +	return 0;
> +}
> +
> +static int sata_bus_softreset(int num)
> +{
> +	u8 status = 0;
> +
> +	port[num].dev_mask = 1;
> +
> +	port[num].ctl_reg = 0x08;	/*Default value of control reg */
> +	writeb(port[num].ctl_reg, port[num].ioaddr.ctl_addr);
> +	udelay(10);
> +	writeb(port[num].ctl_reg | ATA_SRST, port[num].ioaddr.ctl_addr);
> +	udelay(10);
> +	writeb(port[num].ctl_reg, port[num].ioaddr.ctl_addr);
> +
> +	/* spec mandates ">= 2ms" before checking status.
> +	 * We wait 150ms, because that was the magic delay used for
> +	 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
> +	 * between when the ATA command register is written, and then
> +	 * status is checked.  Because waiting for "a while" before
> +	 * checking status is fine, post SRST, we perform this magic
> +	 * delay here as well.
> +	 */
> +	msleep(150);
> +	status = sata_busy_wait(&port[num].ioaddr, ATA_BUSY, 300, 0);
> +	while((status & ATA_BUSY)) {
> +		msleep(100);
> +		status = sata_busy_wait(&port[num].ioaddr, ATA_BUSY, 3, 0);
> +	}
> +
Could you check the coding style, there is also some whitespace issue

Best Regards,
J.