[U-Boot-Users] [PATCH] TQM85xx: NAND support via local bus UPMB

[Wolfgang Grandegger]

Anton Vorontsov wrote:
> On Wed, May 28, 2008 at 08:38:37PM +0200, Wolfgang Grandegger wrote:
>> Scott Wood wrote:
>>> On Wed, May 28, 2008 at 08:12:28PM +0200, Wolfgang Grandegger wrote:
>>>> This patch adds support for NAND FLASH on the TQM8548. It is disabled by
>>>> default and can be enabled for the TQM8548 modules. Note that the R/B pin
>>>> is not supported by that module requiring to use the specified maximum
>>>> delay time.
>>>>
>>>> Note: With NAND support enabled the size of the U-Boot image exceeds
>>>> 256 KB and TEXT_BASE must therefore be set to 0xfff80000 in config.mk,
>>>> doubling the image size :-(.
>>> What does this do differently from the code in drivers/mtd/nand/fsl_upm.c?
>> Maybe it does not support multi banks on a NAND chip. I have to check.
> 
> Me thinks that you'll have to call fsl_upm_nand_init() for each
> chip, and that's all. If not, feel free to patch it as you feel appropriate,
> I'll able to regress-test this driver on MPC8360E-RDK.

That seems not to be a minor problem. If CFG_MAX_NAND_DEVICE > 1,
board_nand_init() will be called twice with the base address from
CFG_NAND_BASE_LIST. The only problem I see is that the UPM interface is
setup twice.

>>> How much of this is board-specific?
>> Well, I already gave drivers/mtd/nand/fsl_upm.c a try but was unable to
>> get it working on this board. Therefore I decided to keep this known to
>> work driver which we have already for a while.
> 
> This isn't really an excuse to duplicate drivers. :-) This driver was
> tested on MPC8555 and MPC8360 CPUs, so it should work with no drastic
> changes. Some issues might still be there, and if so, fixes are highly
> appreciated.

I know, sniff.

>> With Linux, I had more success.
> 
> ..especially if general idea works well, we should use single driver.

I already had a closer look and realized a difference in writing the UPM
array. In fsl_upm.c there is:

  static void fsl_upm_setup(struct fsl_upm *upm)
  {
	int i;

	/* write upm array */
	out_be32(upm->mxmr, FSL_UPM_MxMR_OP_WA);

	for (i = 0; i < 64; i++) {
		out_be32(upm->mdr, upm->array[i]);
		out_8(upm->io_addr, 0x0);
	}

	/* normal operation */
	out_be32(upm->mxmr, FSL_UPM_MxMR_OP_NO);
	while (in_be32(upm->mxmr) != FSL_UPM_MxMR_OP_NO)
		eieio();
  }

But in my driver I fold the machine address into mbmr for each value:

        out_be32 (&lbc->mbmr,
                 (in_be32 (&lbc->mbmr) & ~(MxMR_OP_NORM | MxMR_MAD)) |
                  MxMR_OP_WARR | (i & MxMR_MAD));
                                  ^

Seem also that defines a duplicated :-(.

Has it been tested with an MPC85xx? I will do some more test now.

Wolfgang.