[U-Boot] [PATCH] Support multiple SGMII/TBI interfaces for TSEC ethernet

[Andy Fleming]

On Mon, Sep 8, 2008 at 6:39 PM, Peter Tyser <ptyser at xes-inc.com> wrote:
> The original code only supported using 1 TSEC port in SGMII mode using an
> internal TBI PHY.  Additionally, the TBI internal PHY was being accessed
> at the same register offset as the external PHY for the given TSEC port.
> This hardwiring of the TBI PHY register address based on external PHY
> address will break in many hardware configurations.


Hm.  This doesn't sound quite right.  I agree with the first part of
the patch (I was sure I had tested more than TSEC1, but it doesn't
look like I did it right).  However, I don't understand what you mean
by the TBI internal PHY being accessed at the same address as the
external PHY.  It's assigned to the value of CFG_TBIPA_VALUE.  It's ok
for all of the controllers to use the same value.  If the value
conflicts with that of your external PHY, change CFG_TBIPA_VALUE in
your board's config file.  I'm not really interested in allocating PHY
address space for the TBI PHYs.  It will make things more difficult in
the future, since it effectively halves the number of available
addresses.

Andy