[U-Boot] [PATCH v2] ppc4xx: Allow DTT_I2C_DEV_CODE configured by CFG_I2C_DTT_ADDR

[Victor Gallardo]

On AMCC Arches board DTT_I2C_DEV_CODE is different then canyonlands and glacier.

Signed-off-by: Victor Gallardo <vgallardo at amcc.com>
---
 v2:
 - Add description for CFG_I2C_DTT_ADDR to README

 README               |    6 ++++++
 drivers/hwmon/lm75.c |    4 ++++
 2 files changed, 10 insertions(+), 0 deletions(-)

diff --git a/README b/README
index 37449d1..75d9329 100644
--- a/README
+++ b/README
@@ -1392,6 +1392,12 @@ The following options need to be configured:
 		If defined, then this indicates the I2C bus number for the DTT.
 		If not defined, then U-Boot assumes that DTT is on I2C bus 0.
 
+		CFG_I2C_DTT_ADDR:
+
+		If defined, specifies the I2C address of the DTT device.
+		If not defined, then U-Boot uses predefined value for
+		specified DTT device.
+
 		CONFIG_FSL_I2C
 
 		Define this option if you want to use Freescale's I2C driver in
diff --git a/drivers/hwmon/lm75.c b/drivers/hwmon/lm75.c
index 8051cb2..67a18f6 100644
--- a/drivers/hwmon/lm75.c
+++ b/drivers/hwmon/lm75.c
@@ -38,7 +38,11 @@
 /*
  * Device code
  */
+#if defined(CFG_I2C_DTT_ADDR)
+#define DTT_I2C_DEV_CODE CFG_I2C_DTT_ADDR
+#else
 #define DTT_I2C_DEV_CODE 0x48			/* ON Semi's LM75 device */
+#endif
 #define DTT_READ_TEMP		0x0
 #define DTT_CONFIG		0x1
 #define DTT_TEMP_HYST		0x2
-- 
1.5.5