[U-Boot] U-Boot 1.3.4 and MPC8270 board

Remi Lefevre rlefevre at gmail.com
Thu Sep 11 20:29:24 CEST 2008


Ok, I made some progress.

I realized that my debugger was not correctly initialized and was preventing
accurate stepping. So if you use a Lauterbach with Trace32 and MPC8270,
it seems that you have to reset OR11 & BR11 to 0 in the init script (FYI).

Anyway, I have set my board configuration with the following mapping:
SDRAM           0x0000 0000 0x07FF FFFF
DPRAM Proc 1    0xF000 0000 0xF013 FFFF
...
(slaves and misc)
...
Flash 1         0xF400 0000 0xF4FF FFFF
Flash 2         0xF500 0000 0xF5FF FFFF

U-Boot starts at 0x100, jumps into flash ("in_flash:"), but then hangs
in "init_debug:", when trying to move the DPRAM:

    /* Set the entire dual port RAM (where the initial stack    */
    /* resides) to a known value - makes it easier to see where */
    /* the stack has been written                               */
    /*----------------------------------------------------------*/
    lis r3, (CFG_IMMR + CFG_INIT_SP_OFFSET)@h
    ori r3, r3, (CFG_IMMR + CFG_INIT_SP_OFFSET)@l
    li  r4, ((CFG_INIT_SP_OFFSET - 4) / 4)
    mtctr   r4
    lis r4, 0xdeadbeaf at h
    ori r4, r4, 0xdeadbeaf at l

    stwu    r4, -4(r3)      |
    bdnz    1b              | <- U-Boot loops there then hangs at
                                 0x00000800 or sometimes near 0x00000600

CFG_IMMR (and therefore CFG_INIT_RAM_ADDR) is set to 0xF0000000 so
it seems correct. The constant "0xdeadbeaf" is still a little obscure
to me...

- Any idea what I'm missing ?
- Also, if you see obvious incompatibility between my mapping and
the Linux kernel, I would be glad to know it.

Best regards,
Rémi Lefevre

On Wed, Sep 10, 2008 at 9:20 PM, Remi Lefevre <rlefevre at gmail.com> wrote:
>
> My board has the following main characteristics:
> - 128 MB SDRAM
> - 32 MB Flash (4xAM29LV641)
> - 3x MPC8270 cores (one master, 2 slaves)
> - 60x is used instead of local bus
> - PCI unused
> - RS232 on SMC2
> - HWCW configured by a PLD and used since years


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