Changing the flash from cacheable to cache-inhibited was taking a significant
amount of time due to the fact that we were iterating over the full 256M of
flash. Instead we can just flush the L1 d-cache and invalidate the i-cache.
Signed-off-by: Kumar Gala <galak at kernel.crashing.org>
---
board/freescale/mpc8536ds/mpc8536ds.c | 10 ++++------
board/freescale/mpc8536ds/tlb.c | 2 +-
board/freescale/mpc8572ds/mpc8572ds.c | 10 ++++------
board/freescale/mpc8572ds/tlb.c | 2 +-
4 files changed, 10 insertions(+), 14 deletions(-)
diff --git a/board/freescale/mpc8536ds/mpc8536ds.c b/board/freescale/mpc8536ds/mpc8536ds.c
index 8216c70..6794eb8 100644
--- a/board/freescale/mpc8536ds/mpc8536ds.c
+++ b/board/freescale/mpc8536ds/mpc8536ds.c
@@ -25,6 +25,7 @@
#include <pci.h>
#include <asm/processor.h>
#include <asm/mmu.h>
+#include <asm/cache.h>
#include <asm/immap_85xx.h>
#include <asm/immap_fsl_pci.h>
#include <asm/fsl_ddr_sdram.h>
@@ -441,7 +442,6 @@ pci_init_board(void)
int board_early_init_r(void)
{
- unsigned int i;
const unsigned int flashbase = CFG_FLASH_BASE;
const u8 flash_esel = 1;
@@ -450,11 +450,9 @@ int board_early_init_r(void)
* so that flash can be erased properly.
*/
- /* Invalidate any remaining lines of the flash from caches. */
- for (i = 0; i < 256*1024*1024; i+=32) {
- asm volatile ("dcbi %0,%1": : "b" (flashbase), "r" (i));
- asm volatile ("icbi %0,%1": : "b" (flashbase), "r" (i));
- }
+ /* Flush d-cache and invalidate i-cache of any FLASH data */
+ flush_dcache();
+ invalidate_icache();
/* invalidate existing TLB entry for flash + promjet */
disable_tlb(flash_esel);
diff --git a/board/freescale/mpc8536ds/tlb.c b/board/freescale/mpc8536ds/tlb.c
index 28a9fa8..614f22e 100644
--- a/board/freescale/mpc8536ds/tlb.c
+++ b/board/freescale/mpc8536ds/tlb.c
@@ -54,7 +54,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
/* W**G* - Flash/promjet, localbus */
/* This will be changed to *I*G* after relocation to RAM. */
SET_TLB_ENTRY(1, CFG_FLASH_BASE, CFG_FLASH_BASE,
- MAS3_SX|MAS3_SW|MAS3_SR, MAS2_W|MAS2_G,
+ MAS3_SX|MAS3_SR, MAS2_W|MAS2_G,
0, 1, BOOKE_PAGESZ_256M, 1),
/* *I*G* - PCI */
diff --git a/board/freescale/mpc8572ds/mpc8572ds.c b/board/freescale/mpc8572ds/mpc8572ds.c
index 70b548b..c3a1c4c 100644
--- a/board/freescale/mpc8572ds/mpc8572ds.c
+++ b/board/freescale/mpc8572ds/mpc8572ds.c
@@ -25,6 +25,7 @@
#include <pci.h>
#include <asm/processor.h>
#include <asm/mmu.h>
+#include <asm/cache.h>
#include <asm/immap_85xx.h>
#include <asm/immap_fsl_pci.h>
#include <asm/fsl_ddr_sdram.h>
@@ -359,7 +360,6 @@ void pci_init_board(void)
int board_early_init_r(void)
{
- unsigned int i;
const unsigned int flashbase = CFG_FLASH_BASE;
const u8 flash_esel = 2;
@@ -368,11 +368,9 @@ int board_early_init_r(void)
* so that flash can be erased properly.
*/
- /* Invalidate any remaining lines of the flash from caches. */
- for (i = 0; i < 256*1024*1024; i+=32) {
- asm volatile ("dcbi %0,%1": : "b" (flashbase), "r" (i));
- asm volatile ("icbi %0,%1": : "b" (flashbase), "r" (i));
- }
+ /* Flush d-cache and invalidate i-cache of any FLASH data */
+ flush_dcache();
+ invalidate_icache();
/* invalidate existing TLB entry for flash + promjet */
disable_tlb(flash_esel);
diff --git a/board/freescale/mpc8572ds/tlb.c b/board/freescale/mpc8572ds/tlb.c
index 965356a..0477a4b 100644
--- a/board/freescale/mpc8572ds/tlb.c
+++ b/board/freescale/mpc8572ds/tlb.c
@@ -59,7 +59,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
/* W**G* - Flash/promjet, localbus */
/* This will be changed to *I*G* after relocation to RAM. */
SET_TLB_ENTRY(1, CFG_FLASH_BASE, CFG_FLASH_BASE,
- MAS3_SX|MAS3_SW|MAS3_SR, MAS2_W|MAS2_G,
+ MAS3_SX|MAS3_SR, MAS2_W|MAS2_G,
0, 2, BOOKE_PAGESZ_256M, 1),
/* *I*G* - PCI */
--
1.5.5.1