[U-Boot] [PATCH v3 1/3] 86xx: Cleanup MP support
Kumar Gala
galak at kernel.crashing.org
Wed Apr 1 22:11:27 CEST 2009
* Use CONFIG_MP instead of CONFIG_NUM_CPUS to match 85xx
* Introduce determine_mp_bootpg() helper. We'll need this to address a
bug introduced in v2009.03 with 86xx MP booting. We have to make sure
to reserve the region of memory used for the MP bootpg() so other
u-boot code doesn't use it.
* Added dummy versions of cpu_reset(), cpu_status() & cpu_release() to
allow cmd_mp.c to build and work. In the future we should look at
implementing all these functions. This could be common w/85xx if we
use spin tables on 86xx.
Signed-off-by: Kumar Gala <galak at kernel.crashing.org>
---
* Fixed makefile sorting
* Removed version of cpu_reset() since it makes no sense w/o cpu_release()
* Added new common mp.h
board/freescale/mpc8641hpcn/mpc8641hpcn.c | 2 +-
board/sbc8641d/sbc8641d.c | 2 +-
cpu/mpc86xx/Makefile | 25 ++++++--------
cpu/mpc86xx/cpu_init.c | 2 +-
cpu/mpc86xx/fdt.c | 14 ++------
cpu/mpc86xx/mp.c | 51 ++++++++++++++++++----------
cpu/mpc86xx/mp.h | 7 ----
cpu/mpc86xx/release.S | 2 -
include/configs/MPC8641HPCN.h | 1 +
include/configs/sbc8641d.h | 1 +
10 files changed, 53 insertions(+), 54 deletions(-)
delete mode 100644 cpu/mpc86xx/mp.h
diff --git a/board/freescale/mpc8641hpcn/mpc8641hpcn.c b/board/freescale/mpc8641hpcn/mpc8641hpcn.c
index 1e35dfa..ef0095a 100644
--- a/board/freescale/mpc8641hpcn/mpc8641hpcn.c
+++ b/board/freescale/mpc8641hpcn/mpc8641hpcn.c
@@ -375,7 +375,7 @@ void board_reset(void)
;
}
-#if (CONFIG_NUM_CPUS > 1)
+#ifdef CONFIG_MP
extern void cpu_mp_lmb_reserve(struct lmb *lmb);
void board_lmb_reserve(struct lmb *lmb)
diff --git a/board/sbc8641d/sbc8641d.c b/board/sbc8641d/sbc8641d.c
index fc1f07d..9f69638 100644
--- a/board/sbc8641d/sbc8641d.c
+++ b/board/sbc8641d/sbc8641d.c
@@ -414,7 +414,7 @@ void board_reset(void)
#endif
}
-#if (CONFIG_NUM_CPUS > 1)
+#ifdef CONFIG_MP
extern void cpu_mp_lmb_reserve(struct lmb *lmb);
void board_lmb_reserve(struct lmb *lmb)
diff --git a/cpu/mpc86xx/Makefile b/cpu/mpc86xx/Makefile
index 34a9755..daca79a 100644
--- a/cpu/mpc86xx/Makefile
+++ b/cpu/mpc86xx/Makefile
@@ -29,26 +29,23 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(CPU).a
START = start.o
-SOBJS = cache.o
-ifneq ($(CONFIG_NUM_CPUS),1)
-COBJS-y += mp.o
-SOBJS += release.o
-endif
-COBJS-y += traps.o
+SOBJS-y += cache.o
+SOBJS-$(CONFIG_MP) += release.o
+
COBJS-y += cpu.o
COBJS-y += cpu_init.o
-COBJS-y += speed.o
-COBJS-y += interrupts.o
-
-COBJS-$(CONFIG_OF_LIBFDT) += fdt.o
-
-COBJS-$(CONFIG_MPC8641) += ddr-8641.o
# 8610 & 8641 are identical w/regards to DDR
COBJS-$(CONFIG_MPC8610) += ddr-8641.o
+COBJS-$(CONFIG_MPC8641) += ddr-8641.o
+COBJS-$(CONFIG_OF_LIBFDT) += fdt.o
+COBJS-y += interrupts.o
+COBJS-$(CONFIG_MP) += mp.o
+COBJS-y += speed.o
+COBJS-y += traps.o
-SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS-y))
+SRCS := $(START:.o=.S) $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
+OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
START := $(addprefix $(obj),$(START))
all: $(obj).depend $(START) $(LIB)
diff --git a/cpu/mpc86xx/cpu_init.c b/cpu/mpc86xx/cpu_init.c
index 4f29122..49528aa 100644
--- a/cpu/mpc86xx/cpu_init.c
+++ b/cpu/mpc86xx/cpu_init.c
@@ -31,7 +31,7 @@
#include <mpc86xx.h>
#include <asm/mmu.h>
#include <asm/fsl_law.h>
-#include "mp.h"
+#include <asm/mp.h>
void setup_bats(void);
diff --git a/cpu/mpc86xx/fdt.c b/cpu/mpc86xx/fdt.c
index 383b06b..a36ee30 100644
--- a/cpu/mpc86xx/fdt.c
+++ b/cpu/mpc86xx/fdt.c
@@ -9,15 +9,15 @@
#include <common.h>
#include <libfdt.h>
#include <fdt_support.h>
-#include "mp.h"
+#include <asm/mp.h>
DECLARE_GLOBAL_DATA_PTR;
void ft_cpu_setup(void *blob, bd_t *bd)
{
-#if (CONFIG_NUM_CPUS > 1)
+#ifdef CONFIG_MP
int off;
- u32 bootpg;
+ u32 bootpg = determine_mp_bootpg();
#endif
do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
@@ -48,13 +48,7 @@ void ft_cpu_setup(void *blob, bd_t *bd)
"clock-frequency", CONFIG_SYS_NS16550_CLK, 1);
#endif
-#if (CONFIG_NUM_CPUS > 1)
- /* if we have 4G or more of memory, put the boot page at 4Gb-1M */
- if (gd->ram_size > 0xfffff000)
- bootpg = 0xfff00000;
- else
- bootpg = gd->ram_size - (1024 * 1024);
-
+#ifdef CONFIG_MP
/* Reserve the boot page so OSes dont use it */
off = fdt_add_mem_rsv(blob, bootpg, (u64)4096);
if (off < 0)
diff --git a/cpu/mpc86xx/mp.c b/cpu/mpc86xx/mp.c
index 5014401..2940673 100644
--- a/cpu/mpc86xx/mp.c
+++ b/cpu/mpc86xx/mp.c
@@ -4,20 +4,45 @@
#include <ioports.h>
#include <lmb.h>
#include <asm/io.h>
-#include "mp.h"
+#include <asm/mp.h>
DECLARE_GLOBAL_DATA_PTR;
-#if (CONFIG_NUM_CPUS > 1)
-void cpu_mp_lmb_reserve(struct lmb *lmb)
+int cpu_reset(int nr)
+{
+ /* dummy function so common/cmd_mp.c will build
+ * should be implemented in the future, when cpu_release()
+ * is supported. Be aware there may be a similiar bug
+ * as exists on MPC85xx w/its PIC having a timing window
+ * associated to resetting the core */
+ return 1;
+}
+
+int cpu_status(int nr)
{
- u32 bootpg;
+ /* dummy function so common/cmd_mp.c will build */
+ return 0;
+}
+
+int cpu_release(int nr, int argc, char *argv[])
+{
+ /* dummy function so common/cmd_mp.c will build
+ * should be implemented in the future */
+ return 1;
+}
+u32 determine_mp_bootpg(void)
+{
/* if we have 4G or more of memory, put the boot page at 4Gb-1M */
if ((u64)gd->ram_size > 0xfffff000)
- bootpg = 0xfff00000;
- else
- bootpg = gd->ram_size - (1024 * 1024);
+ return (0xfff00000);
+
+ return (gd->ram_size - (1024 * 1024));
+}
+
+void cpu_mp_lmb_reserve(struct lmb *lmb)
+{
+ u32 bootpg = determine_mp_bootpg();
/* tell u-boot we stole a page */
lmb_reserve(lmb, bootpg, 4096);
@@ -31,18 +56,9 @@ void setup_mp(void)
{
extern ulong __secondary_start_page;
ulong fixup = (ulong)&__secondary_start_page;
- u32 bootpg;
+ u32 bootpg = determine_mp_bootpg();
u32 bootpg_va;
- /*
- * If we have 4G or more of memory, put the boot page at 4Gb-1M.
- * Otherwise, put it at the very end of RAM.
- */
- if (gd->ram_size > 0xfffff000)
- bootpg = 0xfff00000;
- else
- bootpg = gd->ram_size - (1024 * 1024);
-
if (bootpg >= CONFIG_SYS_MAX_DDR_BAT_SIZE) {
/* We're not covered by the DDR mapping, set up BAT */
write_bat(DBAT7, CONFIG_SYS_SCRATCH_VA | BATU_BL_128K |
@@ -65,4 +81,3 @@ void setup_mp(void)
out_be32((uint *)(CONFIG_SYS_CCSRBAR + 0x20), 0x80000000 |
(bootpg >> 12));
}
-#endif
diff --git a/cpu/mpc86xx/mp.h b/cpu/mpc86xx/mp.h
deleted file mode 100644
index 886e0c8..0000000
--- a/cpu/mpc86xx/mp.h
+++ /dev/null
@@ -1,7 +0,0 @@
-#ifndef __MPC86XX_MP_H_
-#define __MPC86XX_MP_H_
-
-void setup_mp(void);
-void cpu_mp_lmb_reserve(struct lmb *lmb);
-
-#endif
diff --git a/cpu/mpc86xx/release.S b/cpu/mpc86xx/release.S
index 95efbb4..67a6f2b 100644
--- a/cpu/mpc86xx/release.S
+++ b/cpu/mpc86xx/release.S
@@ -41,7 +41,6 @@
* Core 0 must copy this to a 1M aligned region and set BPTR
* to point to it.
*/
-#if (CONFIG_NUM_CPUS > 1)
.align 12
.globl __secondary_start_page
__secondary_start_page:
@@ -166,4 +165,3 @@ invl2:
blr
/* Never Returns, Running in Linux Now */
-#endif
diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h
index 9d66101..d8042fb 100644
--- a/include/configs/MPC8641HPCN.h
+++ b/include/configs/MPC8641HPCN.h
@@ -36,6 +36,7 @@
#define CONFIG_MPC86xx 1 /* MPC86xx */
#define CONFIG_MPC8641 1 /* MPC8641 specific */
#define CONFIG_MPC8641HPCN 1 /* MPC8641HPCN board specific */
+#define CONFIG_MP 1 /* support multiple processors */
#define CONFIG_NUM_CPUS 2 /* Number of CPUs in the system */
#define CONFIG_LINUX_RESET_VEC 0x100 /* Reset vector used by Linux */
/*#define CONFIG_PHYS_64BIT 1*/ /* Place devices in 36-bit space */
diff --git a/include/configs/sbc8641d.h b/include/configs/sbc8641d.h
index 1008812..ef0f627 100644
--- a/include/configs/sbc8641d.h
+++ b/include/configs/sbc8641d.h
@@ -40,6 +40,7 @@
#define CONFIG_MPC86xx 1 /* MPC86xx */
#define CONFIG_MPC8641 1 /* MPC8641 specific */
#define CONFIG_SBC8641D 1 /* SBC8641D board specific */
+#define CONFIG_MP 1 /* support multiple processors */
#define CONFIG_NUM_CPUS 2 /* Number of CPUs in the system */
#define CONFIG_LINUX_RESET_VEC 0x100 /* Reset vector used by Linux */
--
1.5.6.6
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