[U-Boot] [PATCH] Marvell MV88F6281GTW_GE Board support

Prafulla Wadaskar prafulla at marvell.com
Sat Apr 4 00:39:30 CEST 2009


From: prafulla_wadaskar <prafulla at marvell.com>

This is Marvell's 88F6281_A0 based custom board developed
for wireless access point product

This patch is tested for-
1. Boot from DRAM/SPI flash/NFS
2. File transfer using tftp and loadb
3. SPI flash read/write/erase
4. Booting Linux kernel and RFS from SPI flash

Signed-off-by: prafulla_wadaskar <prafulla at marvell.com>
Reviewed by: Ronen Shitrit <rshitrit at marvell.com>
Tested by: Piyush Shah <spiyush at marvell.com>
---
 MAKEALL                                         |    1 +
 Makefile                                        |    3 +
 board/Marvell/mv88f6281gtw_ge/Makefile          |   54 +++++++
 board/Marvell/mv88f6281gtw_ge/bin_dep.sh        |   74 +++++++++
 board/Marvell/mv88f6281gtw_ge/config.mk         |   25 +++
 board/Marvell/mv88f6281gtw_ge/dramregs_333h.txt |   27 ++++
 board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.c |  135 ++++++++++++++++
 board/Marvell/mv88f6281gtw_ge/u-boot.lds        |   53 +++++++
 include/configs/mv88f6281gtw_ge.h               |  187 +++++++++++++++++++++++
 9 files changed, 559 insertions(+), 0 deletions(-)
 create mode 100644 board/Marvell/mv88f6281gtw_ge/Makefile
 create mode 100755 board/Marvell/mv88f6281gtw_ge/bin_dep.sh
 create mode 100644 board/Marvell/mv88f6281gtw_ge/config.mk
 create mode 100644 board/Marvell/mv88f6281gtw_ge/dramregs_333h.txt
 create mode 100644 board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.c
 create mode 100644 board/Marvell/mv88f6281gtw_ge/u-boot.lds
 create mode 100644 include/configs/mv88f6281gtw_ge.h

diff --git a/MAKEALL b/MAKEALL
index 854f303..de25165 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -506,6 +506,7 @@ LIST_ARM9="			\
 	lpd7a400		\
 	mx1ads			\
 	mx1fs2			\
+	mv88f6281gtw_ge		\
 	netstar			\
 	nmdk8815		\
 	omap1510inn		\
diff --git a/Makefile b/Makefile
index 8bf36ce..eb2fdfb 100644
--- a/Makefile
+++ b/Makefile
@@ -2564,6 +2564,9 @@ DB64360_config:	unconfig
 DB64460_config:	unconfig
 	@$(MKCONFIG) DB64460 ppc 74xx_7xx db64460 Marvell
 
+mv88f6281gtw_ge_config: unconfig
+	@$(MKCONFIG) $(@:_config=) arm arm926ejs $(@:_config=) Marvell kirkwood
+
 ELPPC_config: unconfig
 	@$(MKCONFIG) $(@:_config=) ppc 74xx_7xx elppc eltec
 
diff --git a/board/Marvell/mv88f6281gtw_ge/Makefile b/board/Marvell/mv88f6281gtw_ge/Makefile
new file mode 100644
index 0000000..32acefc
--- /dev/null
+++ b/board/Marvell/mv88f6281gtw_ge/Makefile
@@ -0,0 +1,54 @@
+#
+# (C) Copyright 2009
+# Marvell Semiconductor <www.marvell.com>
+# Prafulla Wadaskar <prafulla at marvell.com>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+# MA 02110-1301 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)lib$(BOARD).a
+
+COBJS	:= mv88f6281gtw_ge.o
+COBJS	+= ../common/mv88e61xx.o
+
+SOBJS	:= ../common/kw_lowlevel_init.o
+
+SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS))
+SOBJS	:= $(addprefix $(obj),$(SOBJS))
+
+$(LIB):	$(obj).depend $(OBJS) $(SOBJS)
+	$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+	rm -f $(SOBJS) $(OBJS)
+
+distclean:	clean
+	rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/Marvell/mv88f6281gtw_ge/bin_dep.sh b/board/Marvell/mv88f6281gtw_ge/bin_dep.sh
new file mode 100755
index 0000000..5cb1e36
--- /dev/null
+++ b/board/Marvell/mv88f6281gtw_ge/bin_dep.sh
@@ -0,0 +1,74 @@
+#!/bin/sh
+
+# (C) Copyright 2009
+# Marvell Semiconductor <www.marvell.com>
+# Prafulla Wadaskar <prafulla at marvell.com>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+# MA 02110-1301 USA
+#
+
+# This script generates a binary to flash on NAND to achieve
+# boot from NAND operation using doimage kirkwood SOC utility
+# input file :u-boot.bin
+# output file :u-boot-nand.bin
+
+CUR_DIR=$2
+TOP_DIR=`pwd`
+BIN_FILE=$TOP_DIR/$1
+
+DOIMAGE=$TOP_DIR/cpu/arm926ejs/kirkwood/doimage/doimage
+#TEXT_BASE=`cat $CUR_DIR/config.mk | grep TEXT_BASE`
+TEXT_BASE=`cat $CUR_DIR/config.mk | grep TEXT_BASE | sed 's/TEXT_BASE = //g'`
+FLASH_BOOT="-T flash -D $TEXT_BASE -E $TEXT_BASE "
+BOOT_FILE=$TOP_DIR/u-boot-spiflash.bin
+DRAM_FILE=dramregs_333h.txt
+
+if [ "clean" == "$1" ]; then
+	# erase created binary if any
+	rm -f $BOOT_FILE
+	exit 0
+fi
+
+
+if [ ! -f $BIN_FILE ]; then
+	echo Error.. could not find $BIN_FILE
+	exit 1
+fi
+
+if [ ! -f $DOIMAGE ]; then
+	echo Error.. could not find $DOIMAGE utility
+	exit 1
+else
+	cd $CUR_DIR
+	# erase previously created binary if any
+	rm -f $BOOT_FILE
+
+	#generte boot file using doimage
+	echo $TEXT_BASE
+	echo "$DOIMAGE $FLASH_BOOT -R $DRAM_FILE $BIN_FILE $BOOT_FILE"
+	$DOIMAGE $FLASH_BOOT -R $DRAM_FILE $BIN_FILE $BOOT_FILE
+
+	if [ -f $BOOT_FILE ]; then
+		echo
+		echo use $BOOT_FILE to program spi-flash at offset 0x0
+		echo
+	fi
+	cd $TOP_DIR
+fi
+exit 0
diff --git a/board/Marvell/mv88f6281gtw_ge/config.mk b/board/Marvell/mv88f6281gtw_ge/config.mk
new file mode 100644
index 0000000..fb29a1b
--- /dev/null
+++ b/board/Marvell/mv88f6281gtw_ge/config.mk
@@ -0,0 +1,25 @@
+#
+# (C) Copyright 2009
+# Marvell Semiconductor <www.marvell.com>
+# Prafulla Wadaskar <prafulla at marvell.com>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+# MA 02110-1301 USA
+#
+
+TEXT_BASE = 0x00600000
diff --git a/board/Marvell/mv88f6281gtw_ge/dramregs_333h.txt b/board/Marvell/mv88f6281gtw_ge/dramregs_333h.txt
new file mode 100644
index 0000000..d40a9c7
--- /dev/null
+++ b/board/Marvell/mv88f6281gtw_ge/dramregs_333h.txt
@@ -0,0 +1,27 @@
+0xFFD01400 0x43000a00
+0xFFD01404 0x38543000
+0xFFD01408 0x2202433D
+0xFFD0140C 0x0000002A
+0xFFD01410 0x0000000D
+0xFFD01414 0x00000000
+0xFFD01418 0x00000000
+0xFFD0141C 0x00000c52
+0xFFD01420 0x00000046
+0xFFD01424 0x0000F1FF
+0xFFD01428 0x00085520
+0xFFD0147c 0x00008552
+0xFFD01508 0x00000000
+0xFFD01504 0x07FFFFF1
+0xFFD0150C 0x00000000
+0xFFD01514 0x00000000
+0xFFD0151C 0x00000000
+0xFFD01494 0x00010001
+0xFFD01498 0x00000000
+0xFFD0149C 0x0000E811
+0xFFD01480 0x00000001
+0xFFD20204 0x00000000
+0xFFD100E0 0x1B1B1B9B
+0xFFD100D8 0x00000060
+0xFFD1007C 0x00000068
+0xFFD50430 0x00000008
+0x0 0x0
diff --git a/board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.c b/board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.c
new file mode 100644
index 0000000..b88fe3e
--- /dev/null
+++ b/board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.c
@@ -0,0 +1,135 @@
+/*
+ * (C) Copyright 2009
+ * Marvell Semiconductor <www.marvell.com>
+ * Prafulla Wadaskar <prafulla at marvell.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#ifndef MV88F6281GTW_GE_DEBUG
+#define MV88F6281GTW_GE_DEBUG		0
+#endif
+#define DEBUG_PRINT		MV88F6281GTW_GE_DEBUG
+
+#include <common.h>
+#include <debug_prints.h>
+
+/* this line must be removed after this machine name gets mainlined in mach_types.h*/
+#define MACH_TYPE_MV88F6281GTW_GE      1932
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define MV88F6281GTW_GE_OE_VAL_LOW	(BIT20)	/*make GLED on */
+#define MV88F6281GTW_GE_OE_VAL_HIGH	((BIT6)|(BIT13)|(BIT16)|(BIT17))
+#define MV88F6281GTW_GE_OE_LOW		(~((BIT7) | (BIT20) | (BIT21)))	/*enable GLED,RLED */
+#define MV88F6281GTW_GE_OE_HIGH		(~((BIT4)|(BIT6)|(BIT7)|(BIT12)|(BIT13)|(BIT16)|(BIT17)))
+
+/*
+ * Default values for MPP registers
+ */
+#define MV88F6281GTW_GE_MPP0_7		0x01112222
+#define MV88F6281GTW_GE_MPP8_15		0x11103311
+#define MV88F6281GTW_GE_MPP16_23	0x00001111
+#define MV88F6281GTW_GE_MPP24_31	0x22222222
+#define MV88F6281GTW_GE_MPP32_39	0x40440222
+#define MV88F6281GTW_GE_MPP40_47	0x00004444
+#define MV88F6281GTW_GE_MPP48_55	0x00000000
+
+/*
+ * function definitations
+ */
+#ifdef CONFIG_SWITCH_88E61XX
+extern int mv_switch_88e61xx_init(u32 eth_port_num);
+#endif
+
+int board_init(void)
+{
+	unsigned int i;
+
+	debug_print_ftrace();
+	/* Board Parameters initializations */
+	kw_window_ctrl_reg_init();
+	kw_gpio_init(MV88F6281GTW_GE_OE_VAL_LOW,
+			MV88F6281GTW_GE_OE_VAL_HIGH,
+			MV88F6281GTW_GE_OE_LOW,
+			MV88F6281GTW_GE_OE_HIGH);
+
+	kw_mpp_control_init(MV88F6281GTW_GE_MPP0_7,
+			MV88F6281GTW_GE_MPP8_15,
+			MV88F6281GTW_GE_MPP16_23,
+			MV88F6281GTW_GE_MPP24_31,
+			MV88F6281GTW_GE_MPP32_39,
+			MV88F6281GTW_GE_MPP40_47,
+			MV88F6281GTW_GE_MPP48_55);
+
+	/* init serial */
+	gd->baudrate = CONFIG_BAUDRATE;
+	gd->have_console = 1;
+	serial_init();
+	/*
+	 * arch number of USED SOC
+	 */
+	gd->bd->bi_arch_number = MACH_TYPE_MV88F6281GTW_GE;
+
+	/* adress of boot parameters */
+	gd->bd->bi_boot_params = 0x00000100;
+
+	/* relocate the exception vectors */
+	/* U-Boot is running from DRAM at this stage */
+	for (i = 0; i < 0x100; i += 4) {
+		*(unsigned int *)(0x0 + i) = *(unsigned int *)(TEXT_BASE + i);
+	}
+	return 0;
+}
+
+int dram_init(void)
+{
+	int i;
+
+	debug_print_ftrace();
+	for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
+		gd->bd->bi_dram[i].start = kw_get_dram_bank_base_addr(i);
+		gd->bd->bi_dram[i].size = kw_get_dram_bank_size(i);
+	}
+	return 0;
+}
+
+int last_stage_init(void)
+{
+	debug_print_ftrace();
+	return 0;
+}
+
+#if defined(CONFIG_MISC_INIT_R)
+/* miscellaneous platform dependent init */
+int misc_init_r(void)
+{
+	debug_print_ftrace();
+	return kw_misc_init_r();
+}
+
+void reset_phy(void)
+{
+	debug_print_ftrace();
+#ifdef CONFIG_SWITCH_88E61XX
+	mv_switch_88e61xx_init(ETH_0);
+#endif
+}
+
+#endif /* CONFIG_MISC_INIT_R */
diff --git a/board/Marvell/mv88f6281gtw_ge/u-boot.lds b/board/Marvell/mv88f6281gtw_ge/u-boot.lds
new file mode 100644
index 0000000..0338757
--- /dev/null
+++ b/board/Marvell/mv88f6281gtw_ge/u-boot.lds
@@ -0,0 +1,53 @@
+/*
+ * (C) Copyright 2009
+ * Marvell Semiconductor <www.marvell.com>
+ * Prafulla Wadaskar <prafulla at marvell.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+SECTIONS
+{
+	. = _start;
+	. = ALIGN(4);
+	.text	:
+	{
+	  cpu/arm926ejs/start.o	(.text)
+	  *(.text)
+	}
+	.rodata : { *(.rodata) }
+	. = ALIGN(4);
+	.data : { *(.data) }
+	. = ALIGN(4);
+	.got : { *(.got) }
+
+	. = .;
+	__u_boot_cmd_start = .;
+	.u_boot_cmd : { *(.u_boot_cmd) }
+	__u_boot_cmd_end = .;
+
+	. = ALIGN(4);
+	__bss_start = .;
+	.bss (NOLOAD) : { *(.bss) . = ALIGN(4); }
+	_end = .;
+}
+
diff --git a/include/configs/mv88f6281gtw_ge.h b/include/configs/mv88f6281gtw_ge.h
new file mode 100644
index 0000000..70e6dca
--- /dev/null
+++ b/include/configs/mv88f6281gtw_ge.h
@@ -0,0 +1,187 @@
+/*
+ * (C) Copyright 2009
+ * Marvell Semiconductor <www.marvell.com>
+ * Prafulla Wadaskar <prafulla at marvell.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#ifndef _CONFIG_MV88F6281GTW_GE_H
+#define _CONFIG_MV88F6281GTW_GE_H
+
+/*
+ * Version number information
+ */
+#define CONFIG_IDENT_STRING	"\nMarvell-MV88F6281GTW_GE-A0"
+
+/*
+ * High Level Configuration Options (easy to change)
+ */
+#define CONFIG_MARVELL		1
+#define CONFIG_ARM926EJS	1	/* Basic Architecture */
+#define CONFIG_FEROCEON_88FR131	1	/* CPU Core subversion */
+#define LE			1	/* Specify LE/BE operation */
+#define CONFIG_KIRKWOOD		1	/* SOC Family Name */
+#define CONFIG_KW88F6281	1	/* SOC Name */
+#define CONFIG_KW88F6281_A0	1	/* SOC Revision */
+#define CONFIG_MV88F6281GTW_GE_A0 1	/* Board Name */
+
+#ifdef CONFIG_KIRKWOOD
+#define CONFIG_MD5		/* get_random_hex on krikwood needs MD5 support */
+#define CONFIG_KIRKWOOD_EGIGA_INIT /* Enable GbePort0/1 for kernel */
+#define CONFIG_KIRKWOOD_PCIE_INIT  /* Enable PCIE Port0 for kernel */
+#define CONFIG_KIRKWOOD_RGMII_PAD_1V8 /* Set RGMII Pad voltage to 1.8V */
+#endif
+
+/*
+ * Above definitions used in below file, do not change the sequence
+ */
+#include <configs/kirkwood.h>	/* CPU specific information */
+
+/*
+ * CLKs configurations
+ */
+#define CONFIG_SYS_HZ		1000
+#define CONFIG_SYS_TCLK		200000000
+
+/*
+ * Serial Port configuration
+ * The following definitions let you select what serial you want to use
+ * for your console driver.
+ */
+#define CONFIG_KW_SERIAL
+#define CONFIG_CONS_INDEX	0	/*Console on UART0 */
+
+#define CONFIG_BAUDRATE         	115200	/* console baudrate */
+#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200,\
+					  230400, 460800, 921600 }
+/* auto boot */
+#define CONFIG_BOOTDELAY	3	/* default enable autoboot */
+
+/*
+ * For booting Linux, the board info and command line data
+ * have to be in the first 8 MB of memory, since this is
+ * the maximum mapped by the Linux kernel during initialization.
+ */
+#define	CONFIG_BOOTMAPSZ		(8<<20)	/* Initial Memmap for Linux */
+#define CONFIG_CMDLINE_TAG	1	/* enable passing of ATAGs  */
+#define CONFIG_INITRD_TAG	1	/* enable INITRD tag */
+#define CONFIG_SETUP_MEMORY_TAGS 1	/* enable memory tag */
+
+#define	CONFIG_SYS_PROMPT		"Marvell>> "	/* Command Prompt */
+#define	CONFIG_SYS_CBSIZE		1024	/* Console I/O Buff Size */
+#define	CONFIG_SYS_PBSIZE 		(CONFIG_SYS_CBSIZE \
+				+sizeof(CONFIG_SYS_PROMPT)+16)	/* Print Buff */
+/*
+ * Commands configuration
+ */
+#define CONFIG_CMD_ENV
+#define CONFIG_CMD_RUN
+#define CONFIG_CMD_LOADB
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_AUTOSCRIPT
+#define CONFIG_CMD_MEMORY
+#define CONFIG_CMD_BOOTD
+#define CONFIG_CMD_SAVEENV
+#define CONFIG_CMD_SF
+
+/*
+ * Flash configuration
+ */
+#ifdef CONFIG_CMD_SF
+#define CONFIG_SYS_NO_FLASH		1	/* Declare no NOR flash */
+#define CONFIG_SPI_FLASH		1
+#define CONFIG_HARD_SPI			1
+#define CONFIG_KIRKWOOD_SPI		1
+#define CONFIG_SPI_FLASH_MACRONIX	1
+#define CONFIG_ENV_SPI_BUS		0
+#define CONFIG_ENV_SPI_CS		0
+#define CONFIG_ENV_SPI_MAX_HZ		50000000	/*50Mhz */
+#endif
+
+/*
+ *  Environment variables configurations
+ */
+#ifdef CONFIG_SPI_FLASH
+#define CONFIG_ENV_IS_IN_SPI_FLASH	1
+#define CONFIG_ENV_SIZE			_64K	/* 1 spi flash block */
+#define CONFIG_ENV_SECT_SIZE		_64K
+#else
+#define CONFIG_ENV_IS_NOWHERE		1	/* if env in SDRAM */
+#define CONFIG_ENV_SIZE			_128K	/* default 128k */
+#endif
+#define CONFIG_ENV_ADDR			_128K
+#define CONFIG_ENV_OFFSET		_128K	/* env starts here
+						   (can be relocated) */
+/* Default environment variables */
+#define CONFIG_BOOTCOMMAND	"$(x_bootcmd_kernel); setenv bootargs $(x_bootargs) $(x_bootargs_root); bootm 0x6400000; "
+#define CONFIG_EXTRA_ENV_SETTINGS \
+	"x_bootargs=console=ttyS0,115200 mtdparts=spi0.0:512k(uboot),512k at 512k(psm),2m at 1m(kernel),13m at 3m(rootfs)\0" \
+	"x_bootcmd_kernel=cp.b 0xf8100000 0x6400000 0x200000\0" \
+	"x_bootargs_root=root=/dev/mtdblock3 ro rootfstype=squashfs\0"
+
+/*
+ * Size of malloc() pool
+ */
+#define CONFIG_SYS_MALLOC_LEN           _4M
+#define CONFIG_SYS_GBL_DATA_SIZE        128	/* size in bytes reserved for initial data */
+
+/*
+ * Other required minimal configurations
+ */
+#define CONFIG_CONSOLE_INFO_QUIET	/* some code reduction */
+#define CONFIG_MISC_INIT_R	1	/* call misc_init_r() */
+#define CONFIG_NR_DRAM_BANKS 	4
+#define CONFIG_STACKSIZE	_1M	/* regular stack - up to 4M
+					   (in case of exception) */
+#define	CONFIG_SYS_LOAD_ADDR		_8M	/* default load address */
+#define CONFIG_SYS_MEMTEST_START	_4M
+#define CONFIG_SYS_MEMTEST_END		(_8M -1)
+#define CONFIG_SYS_RESET_ADDRESS	0xffff0000	/* Reset Vector Address */
+#define CONFIG_SYS_MAXARGS              16	/* max number of command args */
+
+/*
+ * Ethernet Driver configuration
+ */
+#ifdef CONFIG_CMD_NET
+#define CONFIG_NETCONSOLE	/* include NetConsole support	*/
+#define CONFIG_NET_MULTI	/* specify more that one ports available */
+#define CONFIG_KIRKWOOD_EGIGA	/* Enable SOC specific Ethernet Gigabit
+				   Controller Driver */
+#undef CONFIG_PHY_LINK_DETECT	/* detect link always on */
+				/*specify ports to be used */
+#define CONFIG_KIRKWOOD_EGIGA_PORTS	{TRUE,FALSE}
+				/* phy base addr for multi-chip addressing */
+#define CONFIG_IPADDR                   192.168.5.44
+#define CONFIG_SERVERIP                 192.168.5.30
+#define CONFIG_NETMASK                  255.255.255.0
+#define CONFIG_ENV_OVERWRITE	/* ethaddr can be reprogrammed */
+#endif /* CONFIG_CMD_NET */
+
+/*
+ * Marvell 88Exxxx Switch configurations
+ */
+#define CONFIG_RESET_PHY_R      1	/* use reset_phy() to init phy/swtich */
+#define CONFIG_SWITCH_88E61XX	/* Enable mv88e61xx switch driver */
+#define CONFIG_SWITCH_MV88E6165	/* Used Switch is 88E6165 */
+#define CONFIG_SWITCH_88E61XX_CPU_PORT	5	/* p5 of 88E6165 connceted to CPU */
+#define CONFIG_SWITCH_88E61XX_ENABLED_PORTS	(BIT0 | BIT1 | BIT2 | \
+						BIT3 | BIT4  | BIT5)
+#endif /* _CONFIG_MV88F6281GTW_GE_H */
-- 
1.5.3.3



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