[U-Boot] [PATCH 2/2] at91: Add support for MEESC board of esd gmbh
Jean-Christophe PLAGNIOL-VILLARD
plagnioj at jcrosoft.com
Fri Apr 17 08:00:43 CEST 2009
> --- /dev/null
> +++ b/board/esd/meesc/meesc.c
> @@ -0,0 +1,300 @@
> +/*
> + * (C) Copyright 2007-2008
> + * Stelian Pop <stelian.pop at leadtechdesign.com>
> + * Lead Tech Design <www.leadtechdesign.com>
> + *
> + * (C) Copyright 2009
> + * Daniel Gorsulowski <daniel.gorsulowski at esd.eu>
> + * esd electronic system design gmbh <www.esd.eu>
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#include "meesc.h"
> +#include <common.h>
> +#include <asm/arch/at91_common.h>
> +#include <asm/arch/at91sam9263.h>
please remove no need
> +#include <asm/arch/at91sam9263_matrix.h>
> +#include <asm/arch/at91sam9_smc.h>
> +#include <asm/arch/at91_pmc.h>
> +#include <asm/arch/at91_rstc.h>
> +#include <asm/arch/gpio.h>
> +#include <asm/arch/io.h>
> +#include <asm/arch/hardware.h>
please move this before <asm/arch/at91_common.h>
> +#include <nand.h>
> +#include <dataflash.h>
> +#include <netdev.h>
> +#include <user_led.h>
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +/*
> + * Miscelaneous platform dependent initialisations
> + */
> +
> +#ifdef CONFIG_CMD_NAND
> +static void meesc_nand_hw_init(void)
> +{
> + unsigned long csa;
> +
> + /* Enable CS3 */
> + csa = at91_sys_read(AT91_MATRIX_EBI0CSA);
> + at91_sys_write(AT91_MATRIX_EBI0CSA,
> + csa | AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA);
> +
> + /* Configure SMC CS3 for NAND/SmartMedia */
> + at91_sys_write(AT91_SMC_SETUP(3),
> + AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) |
> + AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0));
> + at91_sys_write(AT91_SMC_PULSE(3),
> + AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) |
> + AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
> + at91_sys_write(AT91_SMC_CYCLE(3),
> + AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
> + at91_sys_write(AT91_SMC_MODE(3),
> + AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
> + AT91_SMC_EXNWMODE_DISABLE |
> +#ifdef CONFIG_SYS_NAND_DBW_16
> + AT91_SMC_DBW_16 |
> +#else /* CONFIG_SYS_NAND_DBW_8 */
> + AT91_SMC_DBW_8 |
> +#endif
> + AT91_SMC_TDF_(2));
> +
> + /* Peripheral Clock Enable Register */
> + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_PIOA |
> + 1 << AT91SAM9263_ID_PIOCDE);
> +
> + /* Configure RDY/BSY */
> + at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
> +
> + /* Enable NandFlash */
> + at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
> +}
> +#endif /* CONFIG_CMD_NAND */
> +
> +#ifdef CONFIG_MACB
> +static void meesc_macb_hw_init(void)
> +{
> + /* Enable clock */
> + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_EMAC);
> + at91_macb_hw_init();
> +}
> +#endif
> +
> +static void meesc_ethercat_hw_init(void)
> +{
> + /* Configure SMC EBI1_CS0 for EtherCAT */
> + at91_sys_write(AT91_SMC1_SETUP(0),
> + AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0) |
> + AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0));
> + at91_sys_write(AT91_SMC1_PULSE(0),
> + AT91_SMC_NWEPULSE_(4) | AT91_SMC_NCS_WRPULSE_(9) |
> + AT91_SMC_NRDPULSE_(4) | AT91_SMC_NCS_RDPULSE_(9));
> + at91_sys_write(AT91_SMC1_CYCLE(0),
> + AT91_SMC_NWECYCLE_(10) | AT91_SMC_NRDCYCLE_(5));
> + /* Configure behavior at external wait signal, byte-select mode, 16 bit
> + data bus width, none data float wait states and TDF optimization */
> + at91_sys_write(AT91_SMC1_MODE(0),
> + AT91_SMC_READMODE | AT91_SMC_EXNWMODE_READY |
> + AT91_SMC_BAT_SELECT | AT91_SMC_DBW_16 | AT91_SMC_TDF_(0) |
> + AT91_SMC_TDFMODE);
> +
> + /* Peripheral Clock Enable Register */
> + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_PIOB |
> + 1 << AT91SAM9263_ID_PIOCDE);
> +
> + /* Configure RDY/BSY */
> + at91_set_B_periph(AT91_PIN_PE20, 0); /* EBI1_NWAIT */
> +}
> +
> +#ifdef CONFIG_HAS_DATAFLASH
> +AT91S_DATAFLASH_INFO dataflash_info[CONFIG_SYS_MAX_DATAFLASH_BANKS];
> +
> +struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS] = {
> + {CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0, 0}, /* Logical adress, CS */
> +};
> +
> +/*define the area offsets*/
> +dataflash_protect_t area_list[NB_DATAFLASH_AREA] = {
> + {0x00000000, 0x000041FF, FLAG_PROTECT_SET, 0, "Bootstrap"},
> + {0x00004200, 0x000083FF, FLAG_PROTECT_CLEAR, 0, "Environment"},
> + {0x00008400, 0x00041FFF, FLAG_PROTECT_SET, 0, "U-Boot"},
> +};
> +#endif /* CONFIG_HAS_DATAFLASH */
> +
> +int board_init(void)
> +{
> + /* Enable Ctrlc */
> + console_init_f();
> +
> + /* arch number of esd MEESC board */
> + gd->bd->bi_arch_number = MACH_TYPE_MEESC;
> +
> + /* adress of boot parameters */
> + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
> +
> + at91_serial_hw_init();
> +#ifdef CONFIG_USER_LED
> + user_LED_init();
> +#endif
> +#ifdef CONFIG_CMD_NAND
> + meesc_nand_hw_init();
> +#endif
> + meesc_ethercat_hw_init();
> +#ifdef CONFIG_HAS_DATAFLASH
> + at91_spi0_hw_init(1 << 0);
> +#endif
> +#ifdef CONFIG_MACB
> + meesc_macb_hw_init();
> +#endif
> + return(0);
return is not a function
please use
return 0;
ditto for the rest of the patch
> +}
> +
> +int dram_init(void)
> +{
> + gd->bd->bi_dram[0].start = PHYS_SDRAM;
> + gd->bd->bi_dram[0].size = get_DRAM_size();
> + return(0);
> +}
> +
> +int board_eth_init(bd_t *bis)
> +{
> + int rc = 0;
> +#ifdef CONFIG_MACB
> + rc = macb_eth_initialize(0, (void *)AT91SAM9263_BASE_EMAC, 0x00);
> +#endif
> + return(rc);
> +}
> +
> +int checkboard(void)
> +{
> + char serno[32];
> +
> + puts("Board: esd CAN-EtherCAT Gateway\n");
> + if (getenv_r("serial#", serno, sizeof(serno)) > 0) {
> + puts(", serial# ");
> + puts(serno);
> + }
> + printf("Hardware-revision: 1.%d\n", get_hw_rev());
> + return(0);
> +}
> +
> +int get_hw_rev(void)
> +{
> + int rev = at91_get_gpio_value(AT91_PIN_PB19);
> + rev |= at91_get_gpio_value(AT91_PIN_PB20) << 1;
> + rev |= at91_get_gpio_value(AT91_PIN_PB21) << 2;
> + rev |= at91_get_gpio_value(AT91_PIN_PB22) << 3;
> +
> + if (rev == 15)
> + rev = 0;
> +
> + return(rev);
> +}
> +
> +int get_DRAM_size(void)
please no uppercase in the function naming
> +{
> + int size = (1 << 27); /* assumed max DRAM size = 128 MByte */
> +
> + __raw_writew(0x0000, PHYS_SDRAM);
> + __raw_writew(0x0000, PHYS_SDRAM | (1 << 24));
> + __raw_writew(0x0000, PHYS_SDRAM | (1 << 25));
> + __raw_writew(0xffff, PHYS_SDRAM | (1 << 26));
> +
> + if (__raw_readw(PHYS_SDRAM | (1 << 25)))
> + size >>= 1;
> + if (__raw_readw(PHYS_SDRAM | (1 << 24)))
> + size >>= 1;
> + if (__raw_readw(PHYS_SDRAM))
> + size >>= 1;
> +
> + return(size);
> +}
> +
> +/*
> + * U-Boot commands
> + */
> +
> +/* ET1100 word switching */
> +int do_wswitch(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
> +{
> + int i = 0;
> +
> + if (get_hw_rev() == 0) {
> + if (argc > 1) {
> + i = argv[1][0] == '1';
> + printf("Setting Pin PA25 to '%d'\n", i);
> + at91_set_gpio_output(AT91_PIN_PA25, i);
> + } else
> + puts("None value given!\n");
> + } else {
> + puts("Not a prototype, word-switching not provided!\n");
> + }
> + return(0);
> +}
> +U_BOOT_CMD(
> + wswitch, 2, 1, do_wswitch,
> + "select read word on ET1100 (prototypes only)",
> + "\n"
> +);
> +
> +/*
> + * CAN physical layer test
> + * This command toggles the CANTX pin. As a result, the differential signal on
> + * CAN bus toggles an can be measured by a scope.
> + * The received signal on CANRX must be equal to the send signal on CANTX. If an
> + * error occurs and the signals are different, an error message is being
> + * displayed.
> + * Conditions for using this command:
> + * -CAN transceiver on CANTX/CANRX
> + * -no other devices on CAN bus
> + * -120R bus termination
> + */
> +int do_cantst(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
> +{
> + unsigned int error = 0;
> + puts("Toggeling Port PA13 (CANTX)... ");
> + /* defines PA13 as output */
> + at91_set_gpio_output(AT91_PIN_PA13, 0);
> + /* defines PA14 as input, internal pullup */
> + at91_set_gpio_input(AT91_PIN_PA14, 1);
> +
> + while (!tstc() && !error) { /* wait for key press or error */
> + at91_set_gpio_value(AT91_PIN_PA13, 1);
> + if (!at91_get_gpio_value(AT91_PIN_PA14))
> + error = 1;
> + at91_set_gpio_value(AT91_PIN_PA13, 0);
> + if (at91_get_gpio_value(AT91_PIN_PA14))
> + error = 1;
> + }
> +
> + if (error)
> + puts("CAN error!!\n");
> + else {
> + puts("done\n");
> + getc(); /* consume input */
> + }
> + return(0);
> +}
> +U_BOOT_CMD(
> + cantst, 2, 1, do_cantst,
> + "toggles CANTX-Pin",
> + "\n"
> +);
please add a README
> diff --git a/board/esd/meesc/meesc.h b/board/esd/meesc/meesc.h
> new file mode 100644
> index 0000000..2ef673b
> --- /dev/null
> +++ b/board/esd/meesc/meesc.h
just move the board_init at the end of the file so no need of this header
> @@ -0,0 +1,32 @@
> +/*
> + * (C) Copyright 2009
> + * Daniel Gorsulowski <daniel.gorsulowski at esd.eu>
> + * esd electronic system design gmbh <www.esd-electronics.com>
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#ifndef _MEESC_H_
> +#define _MEESC_H_
> +
> +#ifdef CONFIG_MACB
> +static void meesc_macb_hw_init(void);
> +#endif
> +static void meesc_ethercat_hw_init(void);
> +int get_hw_rev(void);
> +int get_DRAM_size(void);
> +
> +#endif /* _MEESC_H_ */
> diff --git a/include/configs/meesc.h b/include/configs/meesc.h
> new file mode 100644
> index 0000000..97f32a4
> --- /dev/null
> +++ b/include/configs/meesc.h
> @@ -0,0 +1,191 @@
> +/*
> + * (C) Copyright 2007-2008
> + * Stelian Pop <stelian.pop at leadtechdesign.com>
> + * Lead Tech Design <www.leadtechdesign.com>
> + *
> + * (C) Copyright 2009
> + * Daniel Gorsulowski <daniel.gorsulowski at esd.eu>
> + * esd electronic system design gmbh <www.esd.eu>
> + *
> + * Configuation settings for the esd MEESC board.
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#ifndef __CONFIG_H
> +#define __CONFIG_H
> +
> +/* ARM asynchronous clock */
> +#define AT91_CPU_NAME "AT91SAM9263"
> +#define AT91_MAIN_CLOCK 16000000 /* 16.0 MHz crystal */
> +#define AT91_MASTER_CLOCK 100000000 /* peripheral */
> +#define AT91_CPU_CLOCK 200000000 /* cpu */
> +#define CONFIG_SYS_AT91_PLLB 0x00023f01 /* PLLB settings for USB */
> +#define CONFIG_SYS_HZ 1000 /* decrementer freq */
please move to the new clock framework
> +
> +#define AT91_SLOW_CLOCK 32768 /* slow clock */
> +
> +#define CONFIG_MEESC 1 /* Board is esd MEESC */
> +#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */
> +#define CONFIG_AT91SAM9263 1 /* It's an AT91SAM9263 SoC*/
> +#undef CONFIG_USE_IRQ /* don't need IRQ/FIQ stuff */
> +#define CONFIG_ENV_OVERWRITE 1 /* necessary on prototypes */
> +#define CONFIG_DISPLAY_BOARDINFO 1
> +#define CONFIG_PREBOOT /* enable preboot variable */
> +
> +#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
> +#define CONFIG_SETUP_MEMORY_TAGS 1
> +#define CONFIG_INITRD_TAG 1
> +
> +#define CONFIG_SKIP_LOWLEVEL_INIT
> +#define CONFIG_SKIP_RELOCATE_UBOOT
> +
> +/*
> + * Hardware drivers
> + */
> +#define CONFIG_ATMEL_USART 1
> +#undef CONFIG_USART0
> +#undef CONFIG_USART1
> +#undef CONFIG_USART2
> +#define CONFIG_USART3 1 /* USART 3 is DBGU */
> +
> +#define CONFIG_BOOTDELAY 3
> +
> +/*
> + * BOOTP options
> + */
> +#define CONFIG_BOOTP_BOOTFILESIZE 1
> +#define CONFIG_BOOTP_BOOTPATH 1
> +#define CONFIG_BOOTP_GATEWAY 1
> +#define CONFIG_BOOTP_HOSTNAME 1
> +
> +/*
> + * Command line configuration.
> + */
> +#include <config_cmd_default.h>
> +#undef CONFIG_CMD_BDI
> +#undef CONFIG_CMD_AUTOSCRIPT
> +#undef CONFIG_CMD_FPGA
> +#undef CONFIG_CMD_LOADS
> +#undef CONFIG_CMD_IMLS
> +#undef CONFIG_CMD_USB
you will not use the USB?
> +
> +#define CONFIG_CMD_PING 1
> +#define CONFIG_CMD_DHCP 1
> +#define CONFIG_CMD_NAND 1
> +#define CONFIG_CMD_LED 1
> +
> +/* LED */
> +#define CONFIG_USER_LED 1
> +#define CONFIG_LED1 AT91_PIN_PB8 /* this is LED1A */
> +#define CONFIG_LED2 AT91_PIN_PB7 /* this is LED1B */
> +
> +/* SDRAM */
> +#define CONFIG_NR_DRAM_BANKS 1
> +#define PHYS_SDRAM 0x20000000
> +
> +/* DataFlash */
> +#define CONFIG_ATMEL_DATAFLASH_SPI
> +#define CONFIG_HAS_DATAFLASH 1
> +#ifdef CONFIG_SYS_USE_DATAFLASH
> +
> +/* bootstrap + u-boot + env + linux in dataflash on CS0 */
> +#define CONFIG_ENV_IS_IN_DATAFLASH 1
> +#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \
> + 0x8400)
> +#define CONFIG_ENV_OFFSET 0x4200
> +#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \
> + CONFIG_ENV_OFFSET)
> +#define CONFIG_ENV_SIZE 0x4200
> +#define CONFIG_BOOTCOMMAND "cp.b C0042000 22000000 210000; bootm"
> +
> +#else /* CONFIG_SYS_USE_NANDFLASH */
> +
> +/* bootstrap + u-boot + env + linux in nandflash */
> +#define CONFIG_ENV_IS_IN_NAND 1
> +#define CONFIG_ENV_OFFSET 0x60000
> +#define CONFIG_ENV_OFFSET_REDUND 0x80000
> +#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
> +#define CONFIG_BOOTCOMMAND "nand read 22000000 A0000 200000; bootm"
> +
> +#endif
> +
> +#define CONFIG_BAUDRATE 115200
> +#define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
> +
> +#define CONFIG_SYS_PROMPT "=> "
> +#define CONFIG_SYS_CBSIZE 256
> +#define CONFIG_SYS_MAXARGS 16
> +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
> + sizeof(CONFIG_SYS_PROMPT) + 16)
> +#define CONFIG_SYS_LONGHELP 1
> +#define CONFIG_CMDLINE_EDITING 1
> +
> +/*
> + * Size of malloc() pool
> + */
> +#define CONFIG_SYS_MALLOC_LEN 0x2D000
> +#define CONFIG_SYS_GBL_DATA_SIZE 128 /* 128 bytes for initial data */
> +
> +#define CONFIG_STACKSIZE (32*1024) /* regular stack */
please add a space before and after the '*'
Best Regards,
J.
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