[U-Boot] PCI on mpc832x?

[Kumar Gala]

On Apr 24, 2009, at 9:11 AM, Joakim Tjernlund wrote:

> Scott Wood <scottwood at freescale.com> wrote on 23/04/2009 18:40:01:
>>
>> On Thu, Apr 23, 2009 at 03:32:11PM +0200, Joakim Tjernlund wrote:
>>> Still trying to wrap my head around PCI and I wonder if I need to do
> some
>>> HW init in u-boot in order to use the PCI controller in Linux?
>>
>> Yes.  See pci_init_board() in mpc8323erdb for an example.
>
> Thanks Scott, this was very helpful.
>
> I am trying to map the "ranges" property in the OF tree and I am  
> looking
> at
> the dts files in the kernel tree.
> There are three that comes somewhat close but they all have somewhat
> different
> "ranges" propery:
>
> mpc832x_mds.dts:
> ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000

this is PCI MMIO non-prefetch @ 0x90000000 (cpu & pci) of size 256M

>           0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000

this is PCI MMIO prefetch @ 0x80000000 (cpu & pci) of size 256M

>           0x01000000 0x0 0x00000000 0xd0000000 0x0 0x00100000>;

this is PCI IO @ @ cpu phy 0xd0000000 pci io 0x0 of size 1M

> mpc832x_rdb.dts:
> ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
>           0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
>           0x01000000 0x0 0xd0000000 0xd0000000 0x0 0x04000000>;
>
> mpc8313erdb.dts:
> ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
>           0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
>           0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
>
> Don't understand how I should do here. Just select the mpc832x_rdb.dts
> "ranges" and define my base addresses similarly?
> #define CFG_PCI1_MEM_BASE       0x80000000
> #define CFG_PCI1_MEM_PHYS       CFG_PCI1_MEM_BASE
> #define CFG_PCI1_MEM_SIZE       0x10000000      /* 256M */
> #define CFG_PCI1_MMIO_BASE        0x90000000
> #define CFG_PCI1_MMIO_PHYS        CFG_PCI1_MMIO_BASE
> #define CFG_PCI1_MMIO_SIZE        0x10000000    /* 256M */
> #define CFG_PCI1_IO_BASE        0xd0000000
> #define CFG_PCI1_IO_PHYS        CFG_PCI1_IO_BASE
> #define CFG_PCI1_IO_SIZE        0x4000000       /* 64M */

this is overkill for IO, 64k is the max.  (its probably inherited when  
we didn't know better).

- k