[U-Boot] [PATCH] ARM DaVinci: Adding CONFIG options for NAND ALE and CLE

[s-paulraj at ti.com]

The CLE and ALE for DaVinci DM644x is not the same as DM646x. This patch
adds 2 CONFIG_ options to the config.h header files to all the DM6446 based
boards. These values are then used by the driver. This has been tested on the
DM644x, DM355, DM357 and DM365. Support for the latter 3 will be added soon.

Signed-off-by: Sandeep Paulraj <s-paulraj at ti.com>
---
 drivers/mtd/nand/davinci_nand.c          |    6 +++---
 include/asm-arm/arch-davinci/nand_defs.h |    9 ++++-----
 include/configs/davinci_dvevm.h          |    2 ++
 include/configs/davinci_schmoogie.h      |    2 ++
 include/configs/davinci_sffsdr.h         |    2 ++
 include/configs/davinci_sonata.h         |    2 ++
 6 files changed, 15 insertions(+), 8 deletions(-)

diff --git a/drivers/mtd/nand/davinci_nand.c b/drivers/mtd/nand/davinci_nand.c
index a974667..dcc0f39 100644
--- a/drivers/mtd/nand/davinci_nand.c
+++ b/drivers/mtd/nand/davinci_nand.c
@@ -54,13 +54,13 @@ static void nand_davinci_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int c
 	struct		nand_chip *this = mtd->priv;
 	u_int32_t	IO_ADDR_W = (u_int32_t)this->IO_ADDR_W;
 
-	IO_ADDR_W &= ~(MASK_ALE|MASK_CLE);
+	IO_ADDR_W &= ~(CONFIG_MASK_ALE | CONFIG_MASK_CLE);
 
 	if (ctrl & NAND_CTRL_CHANGE) {
 		if ( ctrl & NAND_CLE )
-			IO_ADDR_W |= MASK_CLE;
+			IO_ADDR_W |= CONFIG_MASK_CLE;
 		if ( ctrl & NAND_ALE )
-			IO_ADDR_W |= MASK_ALE;
+			IO_ADDR_W |= CONFIG_MASK_ALE;
 		this->IO_ADDR_W = (void __iomem *) IO_ADDR_W;
 	}
 
diff --git a/include/asm-arm/arch-davinci/nand_defs.h b/include/asm-arm/arch-davinci/nand_defs.h
index 187d3c3..a2d01b0 100644
--- a/include/asm-arm/arch-davinci/nand_defs.h
+++ b/include/asm-arm/arch-davinci/nand_defs.h
@@ -28,11 +28,10 @@
 
 #include <asm/arch/hardware.h>
 
-#define	MASK_CLE	0x10
-#define	MASK_ALE	0x0a
-
-#define NAND_CE0CLE	((volatile u_int8_t *)(CONFIG_SYS_NAND_BASE + 0x10))
-#define NAND_CE0ALE	((volatile u_int8_t *)(CONFIG_SYS_NAND_BASE + 0x0a))
+#define NAND_CE0CLE	((volatile u_int8_t *)(CONFIG_SYS_NAND_BASE + \
+				CONFIG_MASK_CLE))
+#define NAND_CE0ALE	((volatile u_int8_t *)(CONFIG_SYS_NAND_BASE + \
+				CONFIG_MASK_ALE))
 #define NAND_CE0DATA	((volatile u_int8_t *)CONFIG_SYS_NAND_BASE)
 
 typedef struct  {
diff --git a/include/configs/davinci_dvevm.h b/include/configs/davinci_dvevm.h
index fae430b..1fe3e19 100644
--- a/include/configs/davinci_dvevm.h
+++ b/include/configs/davinci_dvevm.h
@@ -128,6 +128,8 @@
 #define CONFIG_SYS_NAND_BASE		0x02000000
 #define CONFIG_SYS_NAND_HW_ECC
 #define CONFIG_SYS_MAX_NAND_DEVICE	1	/* Max number of NAND devices */
+#define	CONFIG_MASK_CLE			0x10
+#define	CONFIG_MASK_ALE			0x0a
 #define CONFIG_ENV_OFFSET		0x0	/* Block 0--not used by bootcode */
 #define DEF_BOOTM		""
 #elif defined(CONFIG_SYS_USE_NOR)
diff --git a/include/configs/davinci_schmoogie.h b/include/configs/davinci_schmoogie.h
index 923e477..40df3c3 100644
--- a/include/configs/davinci_schmoogie.h
+++ b/include/configs/davinci_schmoogie.h
@@ -90,6 +90,8 @@
 #define CONFIG_SYS_NAND_BASE		0x02000000
 #define CONFIG_SYS_NAND_HW_ECC
 #define CONFIG_SYS_MAX_NAND_DEVICE	1	/* Max number of NAND devices */
+#define	CONFIG_MASK_CLE			0x10
+#define	CONFIG_MASK_ALE			0x0a
 #define CONFIG_ENV_OFFSET		0x0	/* Block 0--not used by bootcode */
 /*=====================*/
 /* Board related stuff */
diff --git a/include/configs/davinci_sffsdr.h b/include/configs/davinci_sffsdr.h
index 73a59db..5d693f8 100644
--- a/include/configs/davinci_sffsdr.h
+++ b/include/configs/davinci_sffsdr.h
@@ -86,6 +86,8 @@
 #define CONFIG_SYS_NAND_BASE		0x02000000
 #define CONFIG_SYS_NAND_HW_ECC
 #define CONFIG_SYS_MAX_NAND_DEVICE	1	/* Max number of NAND devices */
+#define	CONFIG_MASK_CLE			0x10
+#define	CONFIG_MASK_ALE			0x0a
 #define CONFIG_ENV_OFFSET		0x0	/* Block 0--not used by bootcode */
 /* I2C switch definitions for PCA9543 chip */
 #define CONFIG_SYS_I2C_PCA9543_ADDR		0x70
diff --git a/include/configs/davinci_sonata.h b/include/configs/davinci_sonata.h
index 70d2c7d..6699b3a 100644
--- a/include/configs/davinci_sonata.h
+++ b/include/configs/davinci_sonata.h
@@ -123,6 +123,8 @@
 #define CONFIG_SYS_NAND_BASE		0x02000000
 #define CONFIG_SYS_NAND_HW_ECC
 #define CONFIG_SYS_MAX_NAND_DEVICE	1	/* Max number of NAND devices */
+#define	CONFIG_MASK_CLE			0x10
+#define	CONFIG_MASK_ALE			0x0a
 #define CONFIG_ENV_OFFSET		0x0	/* Block 0--not used by bootcode */
 #define DEF_BOOTM		""
 #elif defined(CONFIG_SYS_USE_NOR)
-- 
1.6.0.4