[U-Boot] AMCC 405EX Trap

[Jonathan Haws]

All,

I am experiencing a machine check on a custom AMCC 405EX PPC board.  Our board is based on the AMCC Kilauea evaluation board.  We have a few of these boards that are up and running, but I am trying to track down a machine check error on a couple of them.

My question for you is this:  when the registers are printed to the console, there is one called TRAP.  I want to know how/where/when and with what data that gets populated.  I have read through the AMCC manuals a couple of times trying to find it and have searched through the U-Boot code to no avail.  All I know is that there is a data type "struct pt_regs*" that contains all that data, but nowhere can I find where it is populated.

Below is the console output.  The line "!!!! PAUSE !!!!" was inserted by me after I copied the text from the console to remind me of the ~20 second pause that occurs at that point.

I am hoping that someone can point me to the bit definitions for whatever register is being displayed in TRAP.  From there, I think I can trace the problem back to the specific piece of hardware and get it fixed.

Thanks!

Jonathan




U-Boot 1.3.4 (Apr 28 2009 - 16:10:06)

CPU:   AMCC PowerPC 405EX Rev. C at 400 MHz (PLB=200, OPB=100, EBC=100 MHz)
       Security support
       Bootstrap Option C - Boot ROM Location EBC (16 bits)
       16 kB I-Cache 16 kB D-Cache
Board: SDLPPC - RT PPC405EX Board
I2C:   ready
DRAM:  256 MB
Reserving 16384k for kernel logbuffer at 0fffb000
Top of RAM usable for U-Boot at: 0fffb000
Reserving 306k for U-Boot at: 0ffae000
Reserving 1040k for malloc() at: 0feaa000
Reserving 124 Bytes for Board Info at: 0fea9f84
Reserving 64 Bytes for Global Data at: 0fea9f44
Stack Pointer at: 0fea9f28
New Stack Pointer is: 0fea9f28
 !!!! PAUSE !!!!
Now running in RAM - U-Boot at: 0ffae000
 -> Initializing logBuff pointers...
 -> Calling post_output_backlog()...
 -> Calling post_reloc()...
 -> Sync'ing CPU...
 -> Setting up trap handlers...
Bus Fault @ 0x00000000, fixup 0x00000000
Machine Check Exception.
Caused by (from msr): regs 0fea9de8 Instruction Synchronous Machine Check exception
NIP: 00000000 XER: 20000000 LR: 0FFB071C REGS: 0fea9de8 TRAP: 0200 DEAR: 00000000
MSR: 00000000 EE: 0 PR: 0 FP: 0 ME: 0 IR/DR: 00

GPR00: 0FFB039C 0FEA9ED8 0FEA9F44 0FFAE000 0FFB3D6C 00000001 00000001 00021000
GPR08: 00000600 00002098 17D78400 00000002 2BA7DEF3 FFFFFFFF 0FFF1D00 1000E000
GPR16: 775DF377 FFFFF6FF FFFFFFFF FF5FF7FF FFFFFFFF FFFFFFFF FFDFFFFF FF7FFFFF
GPR24: 0000A000 0FEA9F44 0FFAE000 0FEA9F84 0FEAE000 0FEA9F84 0FFF1ED8 00000000
Call backtrace:
0FFB3D64 0FFB06A4
machine check

--
Jonathan R. Haws
Electrical Engineering
Space Dynamics Laboratory
 
Jonathan.Haws at sdl.usu.edu
(435)797-4629