[U-Boot] [PATCH v2][repost] arm: Kirkwood: add SYSRSTn Duration Counter Support
Jean-Christophe PLAGNIOL-VILLARD
plagnioj at jcrosoft.com
Thu Aug 20 00:29:57 CEST 2009
On 16:24 Wed 19 Aug , Prafulla Wadaskar wrote:
> I am sorry for previous post v2, pls ignore it, this is the right patch for the same
>
> This feature can be used to trigger special command "sysrstcmd" using
> reset key long press event and environment variable "sysrstdelay" is set
> (useful for reset to factory or manufacturing mode execution)
>
> Kirkwood SoC implements a hardware-based SYSRSTn duration counter.
> When SYSRSTn is asserted low, a SYSRSTn duration counter is running.
> The counter value is stored in the SYSRSTn Length Counter Register
> The counter is based on the 25-MHz reference clock (40ns)
> It is a 29-bit counter, yielding a maximum counting duration of
> 2^29/25 MHz (21.4 seconds). When the counter reach its maximum value,
> it remains at this value until counter reset is triggered by setting
> bit 31 of KW_REG_SYSRST_CNT
>
> Implementation:
> Upon long reset assertion (> ${sysrstdleay} in secs) sysrstcmd will be
> executed if pre-defined in environment variables.
> This feature will be disabled if "sysrstdelay" variable is unset.
>
> for-ex.
> setenv sysrst_cmd "echo starting factory reset;
> nand erase 0xa0000 0x20000;
> echo finish ed sysrst command;"
> will erase particular nand sector if triggered by this event
>
> Signed-off-by: Prafulla Wadaskar <prafulla at marvell.com>
> ---
> Change log:
> v2: updated as per review feedback for v1
> bug fix in the previous post (V2) fixed
ok
but I think make optionnal will be better
Best Regards,
J.
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