[U-Boot] [PATCH 2/3] mpc8377erdb: change DDR settings to those from latest bsp

[Kim Phillips]

when using Linus' 83xx_defconfig, the mpc8377rdb would hanging at boot
at either:

NET: Registered protocol family 16

or the

io scheduler cfq registered

message.  Fixing up these DDR settings appears to fix the problem.

Signed-off-by: Kim Phillips <kim.phillips at freescale.com>
---
 include/configs/MPC837XERDB.h |    6 +++---
 1 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h
index b637f73..ca89b9b 100644
--- a/include/configs/MPC837XERDB.h
+++ b/include/configs/MPC837XERDB.h
@@ -190,8 +190,8 @@
 				/* 0x3937d322 */
 #define CONFIG_SYS_DDR_TIMING_2	0x02984cc8
 
-#define CONFIG_SYS_DDR_INTERVAL	((1545 << SDRAM_INTERVAL_REFINT_SHIFT) \
-				| (256 << SDRAM_INTERVAL_BSTOPRE_SHIFT))
+#define CONFIG_SYS_DDR_INTERVAL	((1024 << SDRAM_INTERVAL_REFINT_SHIFT) \
+				| (0 << SDRAM_INTERVAL_BSTOPRE_SHIFT))
 				/* 0x06090100 */
 
 #if defined(CONFIG_DDR_2T_TIMING)
@@ -205,7 +205,7 @@
 				/* 0x43000000 */
 #endif
 #define CONFIG_SYS_DDR_SDRAM_CFG2	0x00001000 /* 1 posted refresh */
-#define CONFIG_SYS_DDR_MODE		((0x0440 << SDRAM_MODE_ESD_SHIFT) \
+#define CONFIG_SYS_DDR_MODE		((0x0406 << SDRAM_MODE_ESD_SHIFT) \
 				| (0x0442 << SDRAM_MODE_SD_SHIFT))
 				/* 0x04400442 */ /* DDR400 */
 #define CONFIG_SYS_DDR_MODE2		0x00000000
-- 
1.6.4