[U-Boot] [PATCH] sh: Fix build of sh7785lcr 32bit mode

Nobuhiro Iwamatsu iwamatsu at nigauri.org
Mon Aug 24 04:01:41 CEST 2009


Update lowlevel_init.S and macro.h.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu at nigauri.org>
---
 board/espt/lowlevel_init.S              |   10 +---
 board/renesas/sh7785lcr/lowlevel_init.S |   96 +++++++++++++------------------
 include/asm-sh/macro.h                  |   37 ++++++++++--
 3 files changed, 71 insertions(+), 72 deletions(-)

diff --git a/board/espt/lowlevel_init.S b/board/espt/lowlevel_init.S
index 7d5d72e..7f0686c 100644
--- a/board/espt/lowlevel_init.S
+++ b/board/espt/lowlevel_init.S
@@ -72,15 +72,7 @@ lowlevel_init:
 	/* set DDR-SDRAM dummy read */
 	write32 MMSEL_A, MMSEL_D

-	mov.l	MMSEL_A, r0
-	synco
-	mov.l	@r0, r1
-	synco
-
-	mov.l	CS0_A, r0
-	synco
-	mov.l	@r0, r1
-	synco
+	write32 MMSEL_A, CS0_A

 	/* set DDR-SDRAM bus/endian etc */
 	write32 MIM_U_A, MIM_U_D
diff --git a/board/renesas/sh7785lcr/lowlevel_init.S
b/board/renesas/sh7785lcr/lowlevel_init.S
index 7faad95..3682efc 100644
--- a/board/renesas/sh7785lcr/lowlevel_init.S
+++ b/board/renesas/sh7785lcr/lowlevel_init.S
@@ -29,8 +29,9 @@
 	.align	2

 lowlevel_init:
-	wait_timer	WAIT_200US
-	wait_timer	WAIT_200US
+
+	wait_timer	33333 /* wait 200us */
+	wait_timer	33333 /* wait 200us */

 	/*------- LBSC -------*/
 	write32 MMSELR_A,	MMSELR_D
@@ -42,11 +43,12 @@ lowlevel_init:
 	write32 DBSC2_DBTR2_A,	DBSC2_DBTR2_D
 	write32 DBSC2_DBFREQ_A,	DBSC2_DBFREQ_D1
 	write32 DBSC2_DBFREQ_A,	DBSC2_DBFREQ_D2
-	wait_timer	WAIT_200US
+	wait_timer	33333 /* wait 200us */

 	write32 DBSC2_DBDICODTOCD_A,	DBSC2_DBDICODTOCD_D
 	write32 DBSC2_DBCMDCNT_A,	DBSC2_DBCMDCNT_D_CKE_H
-	wait_timer	WAIT_200US
+	wait_timer	33333 /* wait 200us */
+
 	write32 DBSC2_DBCMDCNT_A,	DBSC2_DBCMDCNT_D_PALL
 	write32 DBSC2_DBMRCNT_A,	DBSC2_DBMRCNT_D_EMRS2
 	write32 DBSC2_DBMRCNT_A,	DBSC2_DBMRCNT_D_EMRS3
@@ -56,7 +58,7 @@ lowlevel_init:
 	write32 DBSC2_DBCMDCNT_A,	DBSC2_DBCMDCNT_D_REF
 	write32 DBSC2_DBCMDCNT_A,	DBSC2_DBCMDCNT_D_REF
 	write32 DBSC2_DBMRCNT_A,	DBSC2_DBMRCNT_D_MRS_2
-	wait_timer	WAIT_200US
+	wait_timer	33333 /* wait 200us */

 	write32 DBSC2_DBMRCNT_A,	DBSC2_DBMRCNT_D_EMRS1_2
 	write32 DBSC2_DBMRCNT_A,	DBSC2_DBMRCNT_D_EMRS1_1
@@ -65,25 +67,41 @@ lowlevel_init:
 	write32 DBSC2_DBRFCNT1_A,	DBSC2_DBRFCNT1_D
 	write32 DBSC2_DBRFCNT2_A,	DBSC2_DBRFCNT2_D
 	write32 DBSC2_DBRFCNT0_A,	DBSC2_DBRFCNT0_D
-	wait_timer	WAIT_200US
+	wait_timer	33333 /* wait 200us */

 	/*------- GPIO -------*/
-	write16 PACR_A,	PACR_D
-	write16 PBCR_A,	PBCR_D
-	write16 PCCR_A,	PCCR_D
-	write16 PDCR_A,	PDCR_D
-	write16 PECR_A,	PECR_D
-	write16 PFCR_A,	PFCR_D
-	write16 PGCR_A,	PGCR_D
-	write16 PHCR_A,	PHCR_D
-	write16 PJCR_A,	PJCR_D
-	write16 PKCR_A,	PKCR_D
-	write16 PLCR_A,	PLCR_D
-	write16 PMCR_A,	PMCR_D
-	write16 PNCR_A,	PNCR_D
-	write16 PPCR_A,	PPCR_D
-	write16 PQCR_A,	PQCR_D
-	write16 PRCR_A,	PRCR_D
+	#define GPIO_BASE   0xffe70000
+	write16 GPIO_BASE, 0x00	/* A */
+
+	write16 (GPIO_BASE+0x2), 0x00
+
+	write16 (GPIO_BASE+0x4), 0x00
+
+	write16 (GPIO_BASE+0x6), 0x00
+
+	write16 (GPIO_BASE+0x8), 0x00
+
+	write16 (GPIO_BASE+0xA), 0x00
+
+	write16 (GPIO_BASE+0xC), 0x00
+
+	write16 (GPIO_BASE+0xE), 0x00c0
+
+	write16 (GPIO_BASE+0x10), 0xc3fc /* J */
+
+	write16 (GPIO_BASE+0x12), 0x03ff
+
+	write16 (GPIO_BASE+0x14), 0x00
+
+	write16 (GPIO_BASE+0x16), 0xFFFF
+
+	write16 (GPIO_BASE + 0x18), 0xf0c3
+
+	write16 (GPIO_BASE + 0x1A), 0x00 /* P */
+
+	write16 (GPIO_BASE + 0x1C), 0x00
+
+	write16 (GPIO_BASE + 0x1E), 0x00

 	write8	PEPUPR_A,	PEPUPR_D
 	write8	PHPUPR_A,	PHPUPR_D
@@ -232,24 +250,6 @@ DBSC2_DBRFCNT0_D:	.long	0x00010000

 WAIT_200US:	.long	33333

-/*------- GPIO -------*/
-PACR_D:		.long	0x0000
-PBCR_D:		.long	0x0000
-PCCR_D:		.long	0x0000
-PDCR_D:		.long	0x0000
-PECR_D:		.long	0x0000
-PFCR_D:		.long	0x0000
-PGCR_D:		.long	0x0000
-PHCR_D:		.long	0x00c0
-PJCR_D:		.long	0xc3fc
-PKCR_D:		.long	0x03ff
-PLCR_D:		.long	0x0000
-PMCR_D:		.long	0xffff
-PNCR_D:		.long	0xf0c3
-PPCR_D:		.long	0x0000
-PQCR_D:		.long	0x0000
-PRCR_D:		.long	0x0000
-
 PEPUPR_D:	.long	0xff
 PHPUPR_D:	.long	0x00
 PJPUPR_D:	.long	0x00
@@ -263,22 +263,6 @@ P1MSELR_D:	.long	0x3780
 P2MSELR_D:	.long	0x0000

 #define GPIO_BASE	0xffe70000
-PACR_A:		.long	GPIO_BASE + 0x00
-PBCR_A:		.long	GPIO_BASE + 0x02
-PCCR_A:		.long	GPIO_BASE + 0x04
-PDCR_A:		.long	GPIO_BASE + 0x06
-PECR_A:		.long	GPIO_BASE + 0x08
-PFCR_A:		.long	GPIO_BASE + 0x0a
-PGCR_A:		.long	GPIO_BASE + 0x0c
-PHCR_A:		.long	GPIO_BASE + 0x0e
-PJCR_A:		.long	GPIO_BASE + 0x10
-PKCR_A:		.long	GPIO_BASE + 0x12
-PLCR_A:		.long	GPIO_BASE + 0x14
-PMCR_A:		.long	GPIO_BASE + 0x16
-PNCR_A:		.long	GPIO_BASE + 0x18
-PPCR_A:		.long	GPIO_BASE + 0x1a
-PQCR_A:		.long	GPIO_BASE + 0x1c
-PRCR_A:		.long	GPIO_BASE + 0x1e
 PEPUPR_A:	.long	GPIO_BASE + 0x48
 PHPUPR_A:	.long	GPIO_BASE + 0x4e
 PJPUPR_A:	.long	GPIO_BASE + 0x50
diff --git a/include/asm-sh/macro.h b/include/asm-sh/macro.h
index 2b273c3..55f4eb1 100644
--- a/include/asm-sh/macro.h
+++ b/include/asm-sh/macro.h
@@ -22,30 +22,53 @@
 #ifdef __ASSEMBLY__

 .macro	write32, addr, data
-	mov.l \addr ,r1
-	mov.l \data ,r0
+	mov.l 1f ,r1
+	mov.l 2f ,r0
+	bra	3f
 	mov.l r0, @r1
+	.align 2
+
+1:	.long \addr
+2:	.long \data
+3:
 .endm

 .macro	write16, addr, data
-	mov.l \addr ,r1
-	mov.w \data ,r0
+	mov.l 1f ,r1
+	mov.w 2f ,r0
+	bra	3f
 	mov.w r0, @r1
+	.align 2
+
+1:	.long \addr
+2:	.word \data
+3:
 .endm

 .macro	write8, addr, data
-	mov.l \addr ,r1
-	mov.l \data ,r0
+	mov.l 1f ,r1
+	mov.l 2f ,r0
+	bra	3f
 	mov.b r0, @r1
+	.align 2
+
+1:	.long \addr
+2:	.long \data
+3:
 .endm

 .macro	wait_timer, time
-	mov.l	\time ,r3
+	mov.l	2f ,r3
+	bra 3f
 1:
 	nop
 	tst	r3, r3
 	bf/s	1b
 	dt	r3
+	.align 2
+
+2:  .long \time
+3:
 .endm

 #endif /* __ASSEMBLY__ */
-- 
1.6.3.3



-- 
Nobuhiro Iwamatsu / Debian Developer
   iwamatsu at {nigauri.org / debian.org}


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