[U-Boot] mpc83xx: update LCRR register handling

[Liu Dave-R63238]

> MPC8379E RM says (10-34):
> Once LCRR[CLKDIV] is written, the register should be read, and then
> an isync should be executed.
> So update this in code.
> Also define a LCRR mask for processors, which uses not all bits
> in the LCRR register (as for example mpc832x did).
> 
> Signed-off-by: Heiko Schocher <hs at denx.de>
> ---
>  cpu/mpc83xx/cpu_init.c |   11 +++++++++--
>  include/mpc83xx.h      |    5 +++++
>  2 files changed, 14 insertions(+), 2 deletions(-)
> 
> diff --git a/cpu/mpc83xx/cpu_init.c b/cpu/mpc83xx/cpu_init.c
> index ea4f2af..b733fce 100644
> --- a/cpu/mpc83xx/cpu_init.c
> +++ b/cpu/mpc83xx/cpu_init.c
> @@ -23,8 +23,8 @@
>  #include <common.h>
>  #include <mpc83xx.h>
>  #include <ioports.h>
> -#ifdef CONFIG_USB_EHCI_FSL
>  #include <asm/io.h>
> +#ifdef CONFIG_USB_EHCI_FSL
>  #include <usb/ehci-fsl.h>
>  #endif
> 
> @@ -194,7 +194,14 @@ void cpu_init_f (volatile immap_t * im)
>  	im->reset.rmr = (RMR_CSRE & (1<<RMR_CSRE_SHIFT));
> 
>  	/* LCRR - Clock Ratio Register (10.3.1.16) */
> -	im->lbus.lcrr = CONFIG_SYS_LCRR;
> +	out_be32(&im->lbus.lcrr, ((in_be32(&im->lbus.lcrr) & 
> ~LCRR_MASK) | \
> +			(CONFIG_SYS_LCRR & LCRR_MASK)));
> +	/* MPC8379E RM 10-34 says after writting this register
> +	 * the register should be reread and an isync should be
> +	 * executed.
> +	 */
> +	in_be32(&im->lbus.lcrr);
> +	isync();

Hi Heiko,

It would be great if you guy can move this code to cpu_init_r.

If we change the local bus clock freq while the code is running
from the local bus, it is not safe.

Thanks, Dave