[U-Boot] Ideas on implementing bootcount limit support on non PPC?

[Brian Hutchinson]

Hi,

I have been searching the archives and I've seen posts that suggest that the
bootcount feature is trivial to implement in non PPC cpu's but haven't seen
a discussion of what would be involved or ideas on how to go about it.

I have flash (where the u-boot env. vars are stored) and EEPROM via I2c.  My
ARM926ejs variant has SRAM on chip, but I'm not sure of its state on reset
yet.

So should I use flash or eeprom to store the bootcount?  I know it was
originally intended to increment only on reset (not power cycle) but I don't
know how I can accomplish since I asked chip vendor if any registers survive
reset and the answer was "no".

Looking for ideas on the best way to go about implementing this feature for
a ARM926ejs based core.  Actual chip is picoChip PC205.

Regards,

Brian