[U-Boot] [PATCH] mpc85xx, mpc86xx: Fix gd->cpu pointer after relocation

[Peter Tyser]

The gd->cpu pointer is set to an address located in flash when the
probecpu() function is called while U-Boot is executing from flash.
This pointer needs to be updated to point to an address in RAM after
relocation has occurred otherwise Linux may not be able to boot due to
"fdt board" crashing if flash has been erased or changed.

This bug was introduced in commit
a0e2066f392782730f0398095e583c87812d97f2.

Signed-off-by: Peter Tyser <ptyser at xes-inc.com>
Reported-by: Ed Swarthout <Ed.Swarthout at freescale.com>
---
Below is the output of Ed's test after applying this patch:
U-Boot 2009.11-rc2-00110-g5b75c04-dirty (Dec 15 2009 - 12:05:00)

cpu_numcores gd=e0003f80 cpu=fffd0a60 n=2
CPU0:  8572E, Version: 1.1, (0x80e80011)
Core:  E500, Version: 3.0, (0x80210030)
cpu_numcores gd=e0003f80 cpu=fffd0a60 n=2
cpu_numcores gd=e0003f80 cpu=fffd0a60 n=2
cpu_numcores gd=e0003f80 cpu=fffd0a60 n=2
Clock Configuration:cpu_numcores gd=e0003f80 cpu=fffd0a60 n=2

       CPU0:1333.333 MHz, cpu_numcores gd=e0003f80 cpu=fffd0a60 n=2
CPU1:1333.333 MHz, cpu_numcores gd=e0003f80 cpu=fffd0a60 n=2

       CCB:533.333 MHz,
       DDR:333.333 MHz (666.667 MT/s data rate) (Asynchronous), LBC:66.667 MHz
L1:    D-cache 32 kB enabled
       I-cache 32 kB enabled
Board: X-ES XPedite5370 3U VPX SBC
       Rev A, Serial# 12345678, Cfg 12345678-1
I2C:   ready
DRAM:  cpu_numcores gd=e0003f80 cpu=fffd0a60 n=2
cpu_numcores gd=e0003f80 cpu=fffd0a60 n=2
cpu_numcores gd=e0003f80 cpu=fffd0a60 n=2
cpu_numcores gd=e0003f80 cpu=fffd0a60 n=2
cpu_numcores gd=e0003f80 cpu=fffd0a60 n=2
cpu_numcores gd=e0003f80 cpu=fffd0a60 n=2
 2 GB (DDR2, 64-bit, CL=5, ECC on)
       DDR Controller Interleaving Mode: bank
FLASH: Executed from FLASH1
FLASH: 256 MB
L2:    1024 KB enabled
cpu_numcores gd=7fe67f78 cpu=7ffc0a60 n=2
cpu_numcores gd=7fe67f78 cpu=7ffc0a60 n=2
cpu_numcores gd=7fe67f78 cpu=7ffc0a60 n=2
cpu_numcores gd=7fe67f78 cpu=7ffc0a60 n=2
NAND:  1024 MiB
...

=> md 7ffc0a60
7ffc0a60: 38353732 00000000 00000000 00000000    8572............
7ffc0a70: 0080e800 00000002 50313031 31000000    ........P1011...
7ffc0a80: 00000000 00000000 0080e500 00000001    ................
7ffc0a90: 50313031 31000000 00000000 00000000    P1011...........
7ffc0aa0: 0080ed00 00000001 50313032 30000000    ........P1020...
7ffc0ab0: 00000000 00000000 0080e400 00000002    ................
7ffc0ac0: 50313032 30000000 00000000 00000000    P1020...........
7ffc0ad0: 0080ec00 00000002 50323031 30000000    ........P2010...
7ffc0ae0: 00000000 00000000 0080e300 00000001    ................
7ffc0af0: 50323031 30000000 00000000 00000000    P2010...........
7ffc0b00: 0080eb00 00000001 50323032 30000000    ........P2020...
7ffc0b10: 00000000 00000000 0080e200 00000002    ................
7ffc0b20: 50323032 30000000 00000000 00000000    P2020...........
7ffc0b30: 0080ea00 00000002 50343034 30000000    ........P4040...
7ffc0b40: 00000000 00000000 00820100 00000004    ................
7ffc0b50: 50343034 30000000 00000000 00000000    P4040...........
=> 

 lib_ppc/board.c |    8 ++++++++
 1 files changed, 8 insertions(+), 0 deletions(-)

diff --git a/lib_ppc/board.c b/lib_ppc/board.c
index 765f97a..dd22f99 100644
--- a/lib_ppc/board.c
+++ b/lib_ppc/board.c
@@ -645,6 +645,14 @@ void board_init_r (gd_t *id, ulong dest_addr)
 	/* The Malloc area is immediately below the monitor copy in DRAM */
 	malloc_start = dest_addr - TOTAL_MALLOC_LEN;
 
+#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
+	/*
+	 * The gd->cpu pointer is set to an address in flash before relocation.
+	 * We need to update it to point to the same CPU entry in RAM.
+	 */
+	gd->cpu += dest_addr - CONFIG_SYS_MONITOR_BASE;
+#endif
+
 #ifdef CONFIG_SERIAL_MULTI
 	serial_initialize();
 #endif
-- 
1.6.2.1